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3D Vertical Solenoid Inductor by Electrodeposition Technique

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Presentation on theme: "3D Vertical Solenoid Inductor by Electrodeposition Technique"— Presentation transcript:

1 3D Vertical Solenoid Inductor by Electrodeposition Technique
Fazle Rabbi Jannatun Naher Zhijian Xie Numan S Dogan sdsd North Carolina A&T State University, USA

2 Introduction and Brief Review of Inductors
Modeling of Inductors and Improvement scopes Proposed Work Results and Comparison We have divided our presentation into four steps.

3 On-chip planar spiral inductors use large footprint of the chip area
Introduction and Brief Review of Inductors ….introduction High frequency inductors are known as performance and cost limiting elements in RF circuits, as LNA, voltage-controlled oscillators and impedence matching On-chip planar spiral inductors use large footprint of the chip area Due to metal proximity to the substrate its parasitic capacitance and substrate loss is high.

4 Two main improvement techniques
Introduction and Brief Review of Inductors ….earlier work in-brief to overcome the limitations Two main improvement techniques Micromachining Bulk micromachining Surface Micromachining Post fabrication assembly process Post fabrication assembly process by Zou Bulk micromachining by Liang-Hung Surface micromachining by Young Bulk micromachining-substrate etching done completely Surface micromaching- thick insulating layer deposited on substrate Post fabrication assembly process- inductor keep away fro substrate

5 Modeling of Inductors and Improvement scopes ….inductor model
Ls Rs Cs Cox Rsi Csi This model is generally used to define inductors. From the picture on the right hand side we can compare the parameters sourse. Rs-metal series resistance Ls- inductance, Cs- capacitance between two coil, Rsi-substrate resistance, Cox- metal coil and oxide capacitance, Csi--- silicon substrate capacitance

6 Modeling of Inductors and Improvement scopes
….inductor model (simplified) Here we see Rp and Cp is frequency dependent. But, for simplicity we have considered as fixed value. We can extract those from different frequency zone shown right slides. This is HFSS simulation. Rp, Ls and Rs can calculate directly from input impedance graph.(Cp+Cs) can calculate using Fres and Ls;; fres=1/(2*pi*sqrt(ls*Cps); Cps=Cp+Cs

7 Modeling of Inductors and Improvement scopes ….improvement scopes
We have proposed inductor considering three improvement scopes. Rs- by increasing inductor diameter; Rp; Cp– placing inductor distance from substrate, Cp is ignorable

8 ….3-D electrodeposition technique
Proposed Work ….3-D electrodeposition technique Designed by J Hu Metal-wire can grow as minimum as 100nm as direct Electrodeposition initiated by appropriate potential difference between substrate and the system By this technique we can grow metal like superstructure. Micropippete (Z piezostage in picture) can move horizontally and upwards to the vertically.

9 Proposed Work ….Our proposed work Off chip inductor
Aluminum pad to substrate can fabricate up foundry Micro-wire can grow up by electrodeposition technique by J Hu (Georgia Tech and A&T collaboration) Metal thickness a=20um Same footprint can support various size inductor Coil diameter d=80um Footprint is 200umx100um Inductor size 10nH

10 ….Further improvement technique
Proposed Work ….Further improvement technique To terminate magnetic field to enter inside substrate we can put metal shield just under oxide layer. This will Improve quality factor (Q) significantly Here we see magnetic field enters through the substrate, which creates eddy current in the substrate. Which incurs loss as modelled as Rs previously. To terminate magnetic field to enter inside substrate we can place metal sheet just under oxide layer. Which will completely stops mag field to enter inside substrate layer. Such way quality factor of inductor will be more high.

11 Results and Comparison ….comparison with spiral inductor and our work
We see from the comparison Q is significantly high for vertical solenoid inductor than on-chip spiral inductor. This is due to metal series resistance is very low in our case. That’s why resistive loss significantly low for our case. Here we are not using metal shield, so magnetic field enters into substrate. Next slide we will see more improvement by using metal shield.

12 Results and Comparison
….comparison with vertical solenoid inductor with and without metal shield and results from Zou Here we see, using metal shield improves much more than without metal shield. If we compare with another 3D inductor proposed by Zoe, still we see significant improved results in our case.

13 Thank You Question: Did you fabricate the chip and test?
Ans: No. We have fabricated lower part of the inductor (from pad to subatrate at Global Foundry). The metal coil part we are working with Georgia Tech for the remaining. Question: How you make the results? Ans: By using tools High Frequency Structure Simulator (HFSS). This is very powerful tool as a high frequency sumulator


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