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EKT 221 : Digital 2 Serial Transfers & Microoperations

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Presentation on theme: "EKT 221 : Digital 2 Serial Transfers & Microoperations"— Presentation transcript:

1 EKT 221 : Digital 2 Serial Transfers & Microoperations

2 Serial Transfers & Microoperations
Used for “narrow” transfer paths Example : Telephone or cable line Parallel – to – Serial : at source Serial – to – Parallel : at destination Serial micro-operations Example 1 : Addition Example 2 : Error – Correction for CDs Parallel  Serial Serial  Parallel Source Destination

3 Serial Transfers & Microoperations
Serial mode in digital system: information in the system is transferred or manipulated one bit a time. Information is transferred one bit at a time by shifting the bits out of one register and into a second register. This transfer method is in contrast to parallel transfer, in which all the bits of the register are transferred simultaneously at the same time (during one clock pulse).

4 Serial Transfers Serial mode  info is transferred / manipulated one bit at a time Serial transfer of information from Reg A to Reg B is done with shift registers

5 Serial Transfers Serial output (SO) of Reg A connected with serial input (SI) of Reg B SI of Reg A receives 0’s while data from Reg A are transferred to Reg B Initial content of Reg B shifted out to its SO and lost

6 Serial Transfers To maintain the data in Reg A,
connect SO of Reg A to its SI Information is circulated back into Reg A

7 Serial Transfers Shift  determines when & how many times the registers are shifted Clock pulse (Clock) can pass to shift register clock inputs C only when Shift is HIGH (1)

8 Serial Transfers Each shift register has four stages.
Shift signal must be designed for a fixed time of four clock pulses. Shift in HIGH : Clock inputs C  T1, T2, T3 and T4 Shift in LOW : Clock inputs C  HIGH Shift Reg disabled, shifts stop Shift Reg enabled, Shift occurs in both registers

9 Serial Transfers SI (A) = 0 Reg B = Previous value of Reg A

10 Serial Micro-operations
Serial addition is a low cost way to add large numbers of operands, since a “tree” of full adder cells can be made to any depth. Other operations can be performed serially as well, such as parity generation / checking or more complex error – check codes. Shifting a binary number left = multiplying by 2 E.g sl 0100  1000 Shifting a binary number right = dividing by 2 E.g sr 0100  0010

11 Serial Adder – demonstrate the serial mode operation
The circuit shown uses 2 shift registers for operands A (3:0) and B (3:0) A full adder (FA), and one more FF (for carry) is used to compute the sum Result (sum) stored in Reg A and final carry stored in FF

12 Serial Adder – demonstrate the serial mode operation
SHIFT = 1 Result (sum) stored in Reg A Final carry stored in FF Both registers are shifted once to right Carry FF = 0

13 Serial Adder SI of Reg B can receive new inputs
In each clock pulse/cycle : New sum bit is transferred to Reg A New carry transferred to FF Both registers shifted once to the right Process continues until Shift = 0

14 Analyzing the circuit : Serial Adder
Example 1: Find value in Reg A after 4 shifts. Reg A : 1000 Reg B : 0101 A3 A2 A1 A0 B3 B2 B1 B0 SUM (A+B) + Cin Cout Cin T0 1 T1 T2 T3 T4

15 Analyzing the circuit : Serial Adder
B3 B2 B1 B0 SUM (A+B) + Cin Cout Cin T0 1 T1 T2 T3 T4 ANSWER : 1101, after 4 clock cycle

16 Analyzing the circuit : Serial Adder
Example 1: Find value in Reg A after 4 shifts. Reg A : 1011 Reg B : 0101 A3 A2 A1 A0 B3 B2 B1 B0 SUM (A+B) + Cin Cout Cin T0 1 T1 T2 T3 T4

17 Analyzing the circuit : Serial Adder
B3 B2 B1 B0 SUM (A+B) + Cin Cout Cin T0 1 T1 T2 T3 T4 1 is indicated in Cout ANSWER : 10000, after 4 clock cycle

18 Parallel Adder Reg A Sin Sout A0 A1 A2 A3 FA A0 B0 Cin A1 B1 A2 B2 A3
Cout S0 S1 S2 S3 Can be the input for Reg A Reg B Sin Sout B0 B1 B2 B3

19 Serial Vs Parallel Transfers
Space Vs Time Trade-off Serial adder is a sequential circuit because it includes the carry from FF. But need n clock cycle to complete the addition (Less Space, more Time) Parallel adder is a combinational circuit because it needs n FA for n bit operation. Need only one clock cycle to complete the addition. (More Space, less Time) Gives the designer choice. More Space – More cost More Time – More delay (not fast)

20 Thank You


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