1. 王进红，赵雷，封长青，刘树彬，安琪 核探测与核电子学国家重点实验室
基于SCA的波形数字化技术研究
王进红，赵雷，封长青，刘树彬，安琪
核探测与核电子学国家重点实验室

2. Power consumption (high), System Densities (low)
1: Why Waveform Digitizer?
Direct Waveform Digitization offers:
all the waveform information: charge +arrival time, etc
Base line variation and pile up…
2: Approaches of WFD: pros & cons
Traditional Methods, eg. FADCs
Power consumption (high), System Densities (low)
Continuous sampling (Yes)
Switched-Capacitor Arrays
Power consumption (low), System Densities (high)
Continuous sampling (No)

3. Waveform Digitizer with SCAs
0.2-2 ns
Inverter “Domino” ring chain IN
Waveform
stored
Out
FADC
33 MHz
Clock
Shift Register
“Time stretcher” GHz  MHz
By Stefan Ritt

4. DRS4: 4th version of DRS
Designed for the MEG experiment at PSI, Switzerland
UMC 0.25 mm 1P5M MMC process (UMC), 5 x 5 mm2, radiation hard
8+1 ch. each 1024 cells
Differential inputs, differential outputs
Sampling speed 700 MHz … 5 GHz, PLL stabilized
Readout speed 30 MHz, multiplexed or in parallel

5. Outline: Waveform Digitizing with DRS4
DRS Eval. V1.0
1：Operation of DRS4
2: Calibration Strategies
Step 1
8-ch. 5 GSPS Eval. System
3: 5 GS/s Eval. System
1: Interleaved Sampling: GS/s
2: Reconstruction Algorithms: Charge + Timing
Step 2
delays (200ps/8 = 25ps)
G. Varner et al., Nucl.Instrum.Meth. A583, 447 (2007)

6. Step 1: Eval. Of 5GS/s System
Key Features:
8 Chnl. 5GS/s (max.)
~300 MHz BW.
(Passive Input)
(a)
DRS4
ADC: AD9252
FPGA: XC3S5000
USB Readout
(b)
ADC

7. Some Calibration Strategies
DC offset Variation
DC offset Calibration
Uneven Sampling Intervals Dt Dt Dt Dt Dt
(a)
(b)
NIMA :629 (2011)

8. Calibration of DRS4: DC offset
Before cal.~6.8 mV RMS
~0.3 mV RMS
(a)
(c)
DC offset: Cell-to-Cell Variation
DC offset: at Cell No.273
After Cal.~0.35 mV RMS Dt Dt Dt Dt Dt
(d)
(b)
Cell to cell Variation

9. Calibration of DRS4: Sampling IntervalDt
Input
Domino Ring
Sampling Cap.
SCA
(a)
Avg. Bin: 213
DNL: 4.9 ps RMS
4.7 GS/s
RMS: 4.9 ps
(b)
DNL & INL
(c)
Distribution of Bin width

10. Step 2: Further Application
Key Features:
6 Chnl. 5GS/s (max.)
2 Chnl. Interleaved (10 GS/s)
~600 MHz BW.
(Differential Driver)
(a)
Our Plan:
Waveform Timing Precision
Interleaved Sampling
Algorithm
Charge (Amp.) + Arrival Time
DRS4
(b)
ADC

11. Waveform Timing Performance
4.7 GS/s, 600 MHz Bandwidth
WFD DRS4
(a)
RMS : 8.6 ps
Linear Fit
(c)
(b)
Cable Delay Mean：2.2ns

12. Interleaved Sampling (a) (c) Mean: 79 ps RMS : 1 ps (b)
2 chnl. Interleaved: ~ 10 GS/s
For 300 MHz Sine
PCB Delay

13. PMT Pulse + Fast Pulse Rise: 1.2 ns Fast Pulse: ~ 1 ns Rise
DRS: 4.7 GS/s
Lecroy 715
20 GS/s (max.), 1.5 GHz BW
DRS GS/s

14. 探测器部分：
EJ200 +PMT
电子学部分
4 xPMT+1x Trig.
5 GS/s.
2012年3月高能所宇宙线测试

15. 符合插件
双层塑料闪烁体
DRS4
2012年3月高能所宇宙线测试