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A Readout Electronics System for GEM Detectors
IEEE NPSS Real Time Conference 2009 A Readout Electronics System for GEM Detectors Zhi Deng, Yinong Liu, Guanghua Gong Dept. of Engineering Physics, Tsinghua University IHEP, Beijing, China, May 10-15,2009
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GEM Detectors Tsinghua
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Architecture of Readout Electronics
electrons Readout pads CASA Commercial ADC (10bit, ~10MSPS) FPGA (DSP) DAQ Detector Analog Front-ends Digital Back-ends
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CASA: the Front-end ASIC
CSA Gain Stage 1st Shaper 2nd Shaper Variable value of C, giving different charge gain, together with matched size of the MOS transistor A dummy shaper amplifier, transfer signals to differential A fully differential amplifier, with class-AB output stage
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Specifications of CASA
Input Charge fC SNR for MIP >20:1 Gain (Differential) 1-28mV/fC, adjustable Shaping Time (t) 25-100ns, adjustable Output Swing 2 V p-p, differential Drive Load 10pF Crosstalk <1% Power Consumption <10mW/ch
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Chip Performance Test Input Protection Circuits CASA in CPGA package
Power: 8.9 mW/ch Crosstalk: <0.98%
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Programmability Programmable gain Programmable t Adjustable baseline
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Noise Performance Different gain Different t
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Linearity
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With GEM detector COOL-X X-ray Generator (peak @~8keV) GEM detector
CASA and buffer chips
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Sampling and DSP Board Input Buffer AD9212 CLK Xilinx XC4VSX35
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Sampled Noise Spectrum
Normalized Power Spectrum Density Continuous Frequency /Hz f-3dB=100M
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The Impact to SNR no pre-filter tr,preamp =5ns with pre-filter
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Test Results
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Summary A waveform sampling readout electronics system has been developed for GEM detectors, using a front-end ASIC and commercial ADC and FPGA chips. The front-end ASIC has been tested and work successfully. The sampling and DSP board has been designed and will be tested soon. The dependence of SNR with the sampling frequency has been quantitatively studied, which is very important for control of power consumption.
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