1. Metal nanoparticle embedded floating gate memory based on MoS2 with polymer tunneling dielectric layer.
Myung Hun Woo1, Byung Chul Jang1, Junhwan Choi2, Gwang Hyuk Shin1, Hyejeong Seong2, Sung Gap Im2, Sung-Yool Choi1*
1 School of Electrical Engineering, Graphene Research Center, KAIST
2 Department of Chemical and Biomolecular Engineering & KI for NanoCentury, KAIST
Among layered two-dimensional (2D) materials, recently, molybdenum disulfide (MoS2) have been researched in electronics, optoelectronics, and flexible devices due to its promising properties such as direct band gap, atomically thin structure, and a high mobility with a high on/off ratio. In particular, the development of nonvolatile memory is necessary for foundation of a electronics platform based on 2D materials due to its fundamental roles in all modern electronic systems. Although several research groups have reported the nonvolatile memory based on MoS2, the unstable tunneling oxide still remain to be addressed due to the challenging task for deposition of an uniform and thin tunneling oxide via atomic layer deposition (ALD) process by lack of dangling bonds on the surface of MoS2. To realize a reliable nonvolatile memory, we investigated the metal nanoparticle embedded floating gate memory based on MoS2 with polymer thin films as tunneling oxide deposited via the initiated chemical vapor deposition (iCVD) process, which enables solvent, damage-free deposition of polymeric layers at low temperature by gas-phase polymerization for highly uniform, sub-10nm-thick ultrathin polymers on various substrates. The fabricated device showed high on/off ratio and considerable memory characteristics with a large tunable memory window. The application of iCVD polymer as tunneling dielectric in this report provides the development of a reliable multi-bit floating gate memory based on MoS2 memory device.
I. Introduction
II. Experiments
1. Two dimensional materials
1. Device fabrication process
Two dimensional materials (Graphene, TMDCs)
Flexible device
Heterostructure
Transistor
Bio application
2D materials have received great interest because of their particular physical properties such as flexible and transparent characteristics with atomically thin structure.
2. MoS2 properties
III. Results & Analysis
MoS2 : Channel material
 One of promising two dimensional material
 Atomically thin structure, high mobility, flexibility, transparency, direct band gap (layer number dependent)
The fabricated device structure is shown in first figure. The raman shift of MoS2 before and after iCVD process prove that the effect of the process does not result in structural deformation of MoS2. The source and drain ohmic contact properties was observed. Id-Vg curve of the device without metal nanoparticle shows no memory characteristics under the top gate bias sweep of ±15V. The device shows clear charge trapping properties based on F-N tunneling mechanism from the MoS2 channel to the metal nanoparticle floating gate with various DC voltage sweeping. The maximum threshold voltage shift is approximately 6.8V. Clear pulse operations with different programming and erasing pulse width also are measured with the operation of multi-bit memory based on tunable charge trapping density.
2-D material, MoS2
Bandgap
direct bandgap 1.8eV (single-layer)
Thermal stability
> 1090 [oC ]
Young’s modulus
270 [Gpa]
Mobility
1~150 [cm2/V∙s] (layer dependence)
On/off current ratio
107~108
Subthreshold Swing
60~80 [mV/dec.] (layer dependence)
Velocity saturation
0.3 x 107 [cm/s] (silicon: 1.02 x 107)
Critical E-field
2 x 106 [V/cm] (silicon: 4 x 104)
Hysteresis
ΔVth < 0.01 V (hBN Encap.) sweep range: -20 ~120 V
SiO2
p+ Si substrate
Few layer MoS2
Tunneling dielectric pV3D3
Blocking dielectric Al2O3
Drain (Ti/Au)
Source (Ti/Au)
Gate (Cr/Au)
Nanoparticle (Au)
Id-Vg characteristic of the device
without metal nanoparticle
Raman shift
after iCVD process
Device structure
The absence of dangling bonds on 2D materials
 The adsorption of ALD precursors on 2D materials is so weak.
 Pulse action pushes the precursor molecules to the lowest potential energy and purge action pushes the molecule away from substrate.
3. pV3D3 properties
Initial state of the device
Id-VCG characteristics under different VCG,max
pV3D3 : Tunneling dielectric
 initiated CVD method : adsorbed monomers onto the surface are polymerized via reacting with initiator radicals.
 Conformal coverage, solvent free, no surface or substrate limitations.
iCVD process
M, I flow
Heated filaments
Initiator
decomposition
Adsorption
Surface polymerization I M R + P
Extraction of memory window vs. VCG,max
P/E performance
IV. Conclusions
Metal nanoparticle embedded floating gate memory with MoS2 channel and pV3D3 polymer dielectric was fabricated. Ideal memory characteristics with tunable charge trapping density and threshold voltage were observed. Metal nanoparticles between pV3D3 dielectric and Al2O3 formed clear quantum well as a floating gate and charge storage layer.
Injection of monomers and initiators
Adsorption onto the surface
Free-radical surface polymerization
Acknowledgement
This work was supported by the Global Frontier Center for Advanced Soft Electronics ( ), the Creative Research Program of the ETRI (13ZE1110), and KI Research Project.
*mail :
Reference
“Non-volatile Memories”, WILEY (2014)