1. 5 - How Computers Calculate - the ALU
CS 1 Introduction to Computers and Computer Technology
Rick Graziani
Spring 2017

2. Crash Course Videos 5 through 9 More than we will cover
Watch: 5 - How Computers Calculate - the ALU
Watch for your own interest (Additional information coinciding with this presentation)
6 - Registers and RAM
7 - The Central Processing Unit (CPU)
8 - Instructions & Programs
9 - Advanced CPU Designs
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3. Computer Architecture
Central Processing Unit (CPU) or processor
Arithmetic/Logic unit (ALU)
Arithmetic Unit performs arithmetic operations on data such as addition and subtraction
Logic Unit performs boolean operations and simple numerical tests such as negative or positive
Control unit
Coordinating the CPU’s activities
Holds input and results (output) for the ALU
Registers
Temporary storage for the CPU
General registers
Special purpose registers
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4. 5 - How Computers Calculate - the ALU
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5. Full Adder Table
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6. Full Adder Table
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7. Using Logicly
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8. Binary Math - Addition
’s 32’s 16’s 8’s 4’s 2’s 1’s
Dec 1 1 1 1 58 + 27
----- 1 1 1 1 85
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9. Full Adder Table
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10. Overflow 1 1 1 1 1 1 1 1 128’s 64’s 32’s 16’s 8’s 4’s 2’s 1’s 1 1 1 1 1 1 1 1
What happens when we only have storage for an 8-bit number and we need more than 8 bits?
Overflow – Occurs when the result of an addition is TOO LARGE to be represented by the number of bits you are using.
Causes errors and unexpected behavior
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11. Original Pacman Arcade Game
Level 255 =
Level 256 = &^$^%#&
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12. One Solution One solution: More adders, but means more gates
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13. Better Solutions Carry-Look-Ahead Adder
Simple (less expensive) ALUs do not have multiplication or division operations (such as those in your thermostat, microwave or remote)
For example, to multiply they add multiple times.
Computers such as laptops and cell phones have a dedicated processor for tasks like multiplication.
More complicated and more expensive.
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14. Intel 74181 First ALU on a chip (1970)
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15. A CPU can be: A CPU can be:
1. A series of integrated circuits (chips) on one or more circuit boards
Older mainframe and minicomputers
2. On a single integrated circuit known as a microprocessor
microprocessor = a CPU on a single chip
microcomputer = older term for a computer with a microprocessor(s) (PC, Macintosh)
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16. Computer Architecture
Bus
Used to transfer bits between the CPU and RAM (main memory)
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17. 2 + 3 = 5 User interface User Types (Input) Computer Outputs
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18. Computer Architecture
Value = 5
2 + 3 = 5
Value = 2
Value = 3
Task: Add two values stored in main memory (RAM)
Data (two values) must be transferred from main memory to registers within the CPU
ALU: Values are added
Result stored in main memory (RAM)
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19. Computer Architecture
2 + 3
= 5 5 2 2 3 3
2 + 3 = 5
Task: Add two values stored in main memory (RAM)
Data (two values) must be transferred from main memory to registers within the CPU
ALU: Values are added
Result stored in main memory (RAM)
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20. Our CPU and the Pentium CPU
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21. Stored Program Concept
instruction
Stored program concept: A program can be encoded as bit patterns and stored in main memory.
CPU can then:
extract the instructions as needed (copy them into its registers)
execute them
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22. Terminology
Op-code Operand Description
1 RXY LOAD reg. R from cell XY.
2 RXY LOAD reg. R with XY.
3 RXY STORE reg. R at XY.
4 0RS MOVE R to S.
5 RST ADD S and T into R. (2’s comp.)
6 RST ADD S and T into R. (floating pt.)
7 RST OR S and T into R.
8 RST AND S and T into R.
9 RST XOR S and T into R.
A R0X ROTATE reg. R X times.
B RXY JUMP to XY if R = reg. 0.
C HALT.
Machine instruction: An instruction (or command) encoded as a bit pattern recognizable by the CPU
Machine language: The set of all instructions recognized by a machine (CPU)
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23. Machine Language Philosophies
Op-code Operand Description
1 RXY LOAD reg. R from cell XY.
2 RXY LOAD reg. R with XY.
3 RXY STORE reg. R at XY.
4 0RS MOVE R to S.
5 RST ADD S and T into R. (2’s comp.)
6 RST ADD S and T into R. (floating pt.)
7 RST OR S and T into R.
8 RST AND S and T into R.
9 RST XOR S and T into R.
A R0X ROTATE reg. R X times.
B RXY JUMP to XY if R = reg. 0.
C HALT.
Machine Language Philosophies
This slide is now just an FYI
Analogy
Chinese characters: (CISC)
More complex than English (RISC) words
200 English letters might require only 20 Chinese characters.
Chinese requires fewer symbols
Saves on both paper and postage.
However, reading and writing Chinese is more complex
Because each symbol contains more information
The English words are analogous to RISC instructions,
Chinese symbols are analogous to CISC instructions.
Reduced Instruction Set Computing (RISC)
Few, simple, efficient, and fast instructions
Examples: PowerPC from Apple/IBM/Motorola and SPARK from Sun Microsystems
Complex Instruction Set Computing (CISC)
Many, convenient, and powerful instructions
Example: Pentium from Intel
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24. Machine Instruction Types
Op-code Operand Description
1 RXY LOAD reg. R from cell XY.
2 RXY LOAD reg. R with XY.
3 RXY STORE reg. R at XY.
4 0RS MOVE R to S.
5 RST ADD S and T into R. (2’s comp.)
6 RST ADD S and T into R. (floating pt.)
7 RST OR S and T into R.
8 RST AND S and T into R.
9 RST XOR S and T into R.
A R0X ROTATE reg. R X times.
B RXY JUMP to XY if R = reg. 0.
C HALT.
Machine Instruction Types
Data Transfer: Copy data from one location to another
Arithmetic/Logic: Use existing bit patterns to compute a new bit patterns
Control: Direct the execution of the program
More in a moment
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25. Adding values stored in memory2 3
2+3=5 5
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26. Using machine language
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27. Computer Architecture
2 + 3
= 5 6E 5 5 6C 2 5 2 6 3 6D 3
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28. Adding values stored in memory
Step 1
2 + 3
= 5 6E 5 5
Step 2 6C 2 5 2 6 3 6D 3
Step 3
Step 4
Step 5
Data Transfer
Instructions that request the movement (copying) of data from one location to another
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29. Adding values stored in memory
Step 1
2 + 3
= 5 6E 5 5
Step 2 6C 2 5 2 6 3 6D 3
Step 3
Step 4
Step 5
ALU
Instructions that tells the control unit to request an activity within the ALU
Capable of performing operations other than basic arithmetic operations, including: AND, OR, XOR.
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30. Remember our half-adder? Adding two bits
XOR
Inputs: A, B
S = Sum
C = Carry 1 1
AND C S
+ 1
----
A + B = 2’s 1’s = 1
Adding two, eight bit values involves a similar process, just more gates (2 + 3 = 5): = 1
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31. Adding values stored in memory
Step 1
Step 2
Step 3
Step 4
Step 5
Control
Instructions that direct the execution of the program Jump or Branch instructions: Directs the CPU to execute an instruction other than the next one in the list.
Unconditional Jump: Skip to Step 6
Condition Jump: If the value is 0 then Skip to Step 6
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32. The architecture of our machine
Address
Main Memory
256 cells: 00 through FF (Hex)
through
Storage: 8 bits per cell
CPU
16 registers: 0 through F (Hex); 8 bits per cell
Program counter: (Address of) Keeps track of the next instruction
Instruction register: Contains the current instruction to be executed by the ALU.
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33. Converting Decimal, Hex, and Binary
Dec. Hex. Binary Dec. Hex. Binary A B C D E F
1 Hex digit = 4 bits
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34. Loading instructions into the computer
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35. Parts of a Machine Instruction
Op-code Operand Description
1 LOAD reg. R from cell XY.
2 LOAD reg. R with XY.
3 STORE reg. R at XY.
4 MOVE R to S.
5 ADD S and T into R. (2’s comp.)
6 ADD S and T into R. (floating pt.)
7 OR S and T into R.
8 AND S and T into R.
9 XOR S and T into R.
A ROTATE reg. R X times.
B JUMP to XY if R = reg. 0.
C HALT.
Parts of a Machine Instruction
Binary (16 bits)
1 Hex digit = 4 bits
Machine Language
Each instruction involves two parts:
Op-code: Specifies which operation to execute
LOAD, ADD, STORE, etc.
Operand: Gives more detailed information about the operation
Interpretation of operand varies depending on op-code
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36. Parts of a Machine Instruction
Op-code Operand Description
1 LOAD reg. R from cell XY.
2 LOAD reg. R with XY.
3 STORE reg. R at XY.
4 MOVE R to S.
5 ADD S and T into R. (2’s comp.)
6 ADD S and T into R. (floating pt.)
7 OR S and T into R.
8 AND S and T into R.
9 XOR S and T into R.
A ROTATE reg. R X times.
B JUMP to XY if R = reg. 0.
C HALT.
Parts of a Machine Instruction
Store the bits found in register 5 in main memory cell A7
A 7 8 8 5
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37. The machine cycle
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38. Program Execution
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39. The program is stored in main memory ready for execution
1 Hex digit = 4 bits
Hard Disk Drive 00 FF
The program is copied put into main memory.
Typically from permanent storage.
Requires two memory cells per instruction:
Instructions are 16 bits; memory cells are 8 bits
Program counter contains first instruction: A0
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40. Performing the fetch step of the machine cycle
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41. At the beginning of the first fetch: Program Counter = A0
Registers A0 5
Instruction Register 6 … 6C 02 6D 03
At the beginning of the first fetch:
Program Counter = A0 6E
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42. At the beginning of the first fetch:
Program Counter
Registers A2 A0 5
Instruction Register 6
156C … 6C 02 6D 03
At the beginning of the first fetch:
Instruction at A0 (and A1) loaded into Instruction register
Program Counter = A2 6E
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43. CPU analyzes the instruction
Program Counter
Registers A2 5 02
Instruction Register 6
156C …
Load register 5 in main memory cell 6C 6C 02 6D 03 6E
CPU analyzes the instruction
Loads Register 5 with the contents of memory cell address 6C.
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44. At the beginning of the next fetch: Program Counter = A2
Registers A2 5 02
Instruction Register 6 … 6C 02 6D 03
At the beginning of the next fetch:
Program Counter = A2 6E
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45. Program Counter
Registers A4 A2 5 02
Instruction Register 6 03
166D …
Load register 6 in main memory cell 6D 6C 02 6D 03 6E
Instruction at A2 (and A3) loaded into Instruction register
Program Counter incremented: A4
CPU analyzes the instruction
Loads Register 6 with the contents of memory cell address 6D.
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46. At the beginning of the next fetch: Program Counter = A4
Registers A4 2 02
Instruction Register 3 03 … 6C 02 6D 03
At the beginning of the next fetch:
Program Counter = A4 6E
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47. Program Counter
Registers A4 A6 05 5 02
Instruction Register 6 03
5056 … 6C
Add: result into register 0, adding contents of register 5 and register 6 02 6D 03 6E
Adds contents of register 5 and 6, placing result into register 0.
Instruction at A4 (and A5) loaded into Instruction register
Program Counter incremented: A6
CPU analyzes the instruction
Adds contents of register 5 and register 6, storing the result into register 0.
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48. At the beginning of the next fetch: Program Counter = A6
Registers 05 A6 2 02
Instruction Register 3 03 … 6C 02 6D 03
At the beginning of the next fetch:
Program Counter = A6 6E
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49. Program Counter
Registers 05 A6 A8 5 02
Instruction Register 6 03
306E … 6C
Store contents of register 0, in memory cell address 6E 02 6D 03 6E 05
Instruction at A6 (and A7) loaded into Instruction register
Program Counter incremented: A8
CPU analyzes the instruction
Stores contents of register 0 in the memory cell at address 6E.
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50. At the beginning of the next fetch: Program Counter = A8
Registers 05 A8 5 02
Instruction Register 6 03 … 6C 02 6D 03
At the beginning of the next fetch:
Program Counter = A8 6E 05
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51. Program Counter
Registers 05 AA A8 5 02
Instruction Register 6 03
C000 … 6C
Halt the program 02 6D 03 6E 05
Instruction at A8 (and A9) loaded into Instruction register
Program Counter incremented: AA
CPU analyzes the instruction
Halts the program. (Program ends.)
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52. Intel CPUs
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53. Intel CPUs
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54. CPU Heat Sinks and Cooling Fans
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55. Clock Speed: The Speed of the CPU
Clock – Circuit (oscillator) which generates pulses.
Coordinates computers activities
Faster the pulses, faster the computer (CPU) works
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56. Clock Speed: The Speed of the CPU
Clock speed measured in
megahertz (MHz) - the number of millions of beats per second
gigahertz (GHz) - the number of billions of beats per second
Examples:
Early CPUs: MHz
Current Processors: 3 GHz and more
Note:
Clock speed alone is not relevant in comparing CPUs
Other factors such as RISC or CISC architecture
Benchmarking: Process of comparing different CPUs when executing the same program.
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57. Lucy and Ethel demonstrating clock speed
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58. Internal Cache
Internal Cache = memory inside the CPU chip which stores instructions and data which the CPU is currently working on or may soon need.
The CPU must deliver its data at a very high speed.
The regular RAM cannot keep up with that speed.
Therefore, a special RAM type called cache is used as a buffer - temporary storage.
L1 Cache – Same chip as CPU (fastest)
L2 Cache – Separate chip
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59. 5 - How Computers Calculate - the ALU
CS 1 Introduction to Computers and Computer Technology
Rick Graziani