1. Variable Gain CMOS LNA MOREIRA E SILVA, Paulo Marcio, DE SOUSA, Fernando Rangel
Introduction
Simulation results of a variable gain low noise amplifier in a 0.18 μm CMOS technology are presented. This amplifier is designed to operate at the ISM band with two modes of gain. The low gain mode is achieved by a decrease in the resonance tank frequency and by a current decrease of the transconductor transistors.
(a) (b)
Fig. 4- Simulation Results (a) voltage gain (b) return loss
Fig. 1- Simplified receiver system
Fig. 5- Noise figure
The final layout is shown in Fig. 6 where the LNA area with the pads is 1500 μm × 850 μm (1.27 mm²). To help with the measurements, an active balun and two buffers with output impedance of 50 Ohms are implemented in the input and output of the LNA respectively.
Fig. 2- Sigma Delta input impedance
Results
To make the performance simulations of the LNA, its input has an ideal balun which is used to generate the signals RF+ and RF-. And, for its output, the sigma-delta input impedance value is used.
Fig. 6- Layout of the LNA
Parameter
Required
Achieved
Gain (dB)
20 / 0
21 / -0.1
Noise Figure (dB)
< 3.5 / 8
2.8 / 6.3
Return Loss (dB)
< -10
-17 / -13
IIP3 (dBm)
> -13
-3 / -9
Current (mA) X
2x1.5 / 2x0.75
Table 1 – Required and achived specifications at 2.44 GHz
Fig. 3- LNA’s Schematic