1. 6. Terminations

2. 6.1 End terminators
The driving waveform propagates at full intensity all the way down the cable.
All reflections are damped by the terminating resistor.
The received voltage is equal to the transmitted voltage.

3. 6.1.1 Rise time of an end terminator

4. 6.1.2 DC biasing of end terminator
Rarely appears in TTL or CMOS circuits because large drive current required in the HI state.
When Z0 = 65Ω, 76mA (=5V/65Ω) is required for a 5V logic.
Split termination
R1/R2 controls the relative proportions of HI and LO drive current.
Power dissipation :

5. Selection of termination resistors
The parallel combination of R1 and R2 must equal Z0.
Positive direction
2. IOH < IOH,max (maximum high level output current).
3. IOL < IOL,max (maximum low level output current).
The example is for a 74HC11000 NAND and tells us that 65Ω line cannot be driven by 74HC11000.

6. 6.1.3 Other topology used with end terminators
Few systems use this technique due to the difficulty of fabricating lines with widely varying impedance on one board.

8. 6.2 Source terminators
The driving waveform is cut in half by the series-termination resistor before it begins propagating down the line.
The driving signal propagates at half intensity to the end of the line.
At the far end (an open circuit) the signal reflection coefficient is +1. The reflected signal is half intensity. The half-sized reflection plus the original incoming half-sized signal together bring the signal at the receiving end to a full level.
The reflected signal (half sized) propagates back along the line toward the source where it damps out at the source termination.
After the end reflection returns to its source, the drive current drops to zero where it remains until the next transition.

9. 6.2.2 Rise time of source termination
6.2.3 Flatter step response of source termination
It is easier to eliminate reflections at the source than at the far end of a transmission line in typical digital circuits.
6.2.4 Drive current required by source termination
Average current = ΔV/(2Z0) : less power consumption.

10. 6.2.5 Other topologies with source termination
Daisy chain topology does not work. All loads must connect at the end of the line. A load connected midline will see a waveform like that shown in Fig. 6.8 at point C.
6.2.6 Power dissipation in source terminators

11. 6.3 Middle terminators
Middle terminations can improve system step response only at the expense of signal attenuation. (-6dB)

12. 6.4 AC biasing for end terminators
Works only when output signal is DC balanced.
Combination RC circuits can terminate DC-balanced lines with no wasted quiescent power.

13. 6.4.2 End terminators for differential lines

14. 6.5 Resistor selection

15. Series inductance of terminating resistors

17. 6.6 Crosstalk in terminators

18. 6.6.1 Crosstalk from adjacent axial resistors

19. 6.6.3 Crosstalk from SIP terminating resistors