1. UQC113S2 – Embedded Systems
Z85C30 Serial Communication Controller

2. FM-200 Board The FM-200 board has 3 serial ports
The has a built in UART – part of the Motorola 68681
It also has a Zilog Z80C30 SCC USART
2 channels
Lots of protocol support
Bisync, SDLC, HDLC

3. Z85C30 SCC Block Diagram Channel A Channel B Internal Control
Logic
Channel A
Register
Channel A
Databus
CPU &DMA
Bus interface
Control
/INT
/INT ACK
IEI
IEO
Interrupt
Control
Logic
Channel B
Channel B
Register

4. Z85C30 Write Registers REG Description WR0 Reg Pointer –init WR1
TX/RX interrupt enable
WR2
Interrupt Vector
WR3
RX para Ctrl modes
WR4
TX RX para modes
WR5
TX para Ctrl modes
WR6
SYNC SDLC addr
WR7
SYNC SDLC flag
WR8
TX buffer
WR9
Mst Int control/reset
WR10
Misc TX/RX control bits
WR11
Clk ctrl RX/TX
WR12
Baud Rate LSB
WR13
Baud Rate MSB
WR14
Misc control bits
WR15
Ext sts Interrupt enable/control

5. Z85C30 Write Registers TX/RX registers WR3 WR4 WR5 WR8 WR11/12/13
RX enable/disable, RX bits per character
WR4
Parity, Stop and clock modes
WR5
TX enable/disable, TX bits per character
WR8
Transmit register
WR11/12/13
Clock and baud rate

6. Z85C30 Write Registers Interrupt Registers WR1 WR2 WR9 WR15
TX/RX int enable/disable, DMA control
WR2
Interrupt Vector
WR9
Interrupt ack, int status, enable master int
WR15
External status

7. Z85C30 Read Registers REG Description RR0 RX/TX stat Ext stat RR1
Spec RX status
RR2
Int Vect (mod B /Umod B)
RR3
Int pending Channel A
RR4
TX RX para modes
RR5
TX para Ctrl modes
RR6
SDLC FIFO counter LSB
RR7
SDLC FIFO counter MSB
RR8
RX buffer
RR9
RX para & Ctrl modes
RR10
Misc status bits
RR11
Misc TX/RX contrl bits
RR12
Baud Rate LSB time constant
RR13
Baud Rate MSB time constant
RR14
Ext feature & FIFO contro
RR15
Ext status Interrupt info

8. Z85C30 Read Registers TX/RX RR0 RR1 RR8 RR10 TX/RX status
Special RX conditions status
RR8
RX register
RR10
Miscellaneous status bits

9. SCC BiSync Mode
The Z85C30 can operate in automatic BiSync synchronous mode
WR4 selects mono or bisync modes
WR6/7 – holds sync char(s)
WR3 – RX CRC checking
WR5 – TX CRC checking

10. SDLC/HDLC The SDLC/HDLC modes are WR4 – SDLC mode use 01111110
WR5 – SDLC polynomial selected
WR7 – write
WR6 – SDLC address

11. SDLC/HDLC frame format
bits 8 8 8
>0 16 8
address
control
data
checksum

12. SCC SDLC/HDLC frame types
Bits 1 3 1 3
P/F
Seq
Next
information 1
Type
P/F
Next
supervisory
Type 1 1
P/F
Modifier
unnumbered

13. Minos Serial Port programming
It is possible to program the SCC in assembly language using the above registers or in C using MINOS calls
It requires the device name – use the mdir call
Then use the open or fopen calls
Using the returned file pointer with read and write calls

14. Minos Serial Port programming
#include <stdio.h>
FILE *fopen(char *, char*);
int fwrite(char *, int, int, FILE *);
main() {
int nbytes,count;
FILE * fp;
char buff[512];
fp=fopen("TERM","r");
nbytes=fwrite(buff,sizeof(char),sizeof(buff),fp); }
#include <stdio.h>
main() {
int fp, nbytes,count;
char buffer[512];
fp=open("TERM",O_RDONLY);
nbytes=read(fp,buffer,count); }