1. ISIS Synchrotron RF – Recent Work
Craig Clark
Krish Chelliah
Dave Gibbs

2. TH558 HPD

3. June 17 - initial tests up to full gapvolts (~7kV) into 2RF6 cavity using only 1kW Int. Amp
Total Cavity Impedance lower?
Run without liquid resistors?
TH558 HPD – initial tests

4. Cavity RF generation and Phase distribution
Var.
90
Master Oscillator
Static offset
/ antiphase
Modulator
Cavity Lock Phase Mod
 Trim
1 RF.
Cav.
 Ref.
Cavity lock Phase Mod
 Phase Mod
6 x 1RF System
4 x 2RF System
 modulator
 Det.
2 RF.
FLG
Bdot
Frequency
Doubler
BLL
Rad L
BPL
F trim
 Det.
Total Accel Volts sum.
Soon!
Ooperationally running in FPGA since February 2016
Digital LPRF

5. System Timing, Freq. Increment & FF Beam Compensation broadcast over trigger lines
RT – OS
Controller
Diagnostic virtual “scope traces” sent from FPGAs to RTOS controller via 4-Lane PCIe / Switch Fabric Backplane
Digital LPRF

6. Windows PC control VI RF setup parameters- phase offsets, Loop gains etc (set by RF team)

7. Frequency Law Generator / Master Oscillator
Implemented using LabView FPGA on NI PXIe7966R FPGA module + NI MS/s digitiser adapter module generates the RF sweep from 1.3MHz to 3.1MHz for 1RF caivites and 2.6 to 6.3MHz for 2nd Harmonic cavities.

9. Windows PC diagnostics VI (Virtual scope traces)
Enables selection and display of test signals and Displays. Currently available for a limited selection of virtual test points in the FPGA code eg radial loop input (shown above). Deployed on the Windows PC in the LabView development environment, with refresh rates available up to 20Hz or so, but will be rolled out as an executable.

10. R&K 3kW Intermediate Amp

11. Digital LPRF – Beam Phase loop
(Analogue BPL on time 900dP)
Dig MO with 0clks = 0us pipeline delay
Dig MO with 900clks = 3.6us pipeline delay
(Digital BPL on time 1200dP)
Dig MO with 0clks = 0us pipeline delay
Dig MO with 1153clks = 4.6us pipeline delay
Digital LPRF – Beam Phase loop

12. Beam Compensation Unit
RF – Feed forward Beam Compensation
Bunch 1
Bunch 2
Tetrode
Amplifiers
Intermediate
Amplifier
Subtracter -
Variable
gain
delay
LP Filter RF
demand
100Hz
Compensator
Function
Generator
Sum
Electrode
Level Control Servo / Cavity phase loop
Beam Compensation Unit
Fixed frequency – only usable over first 3ms or so

13. IQ FFBC on 2RF systems

14. Accelerating Gap Voltage envelope
FF Gain
Cavlock
LC Servo
Anode Current
PtP Bunch height
Tuning PD Grid-Gap
Tuning PD LC Out - Gap
FF I Signal
No FFBC
With FFBC
Accelerating Gap Voltage envelope
IQ FFBC on 2RF systems

15. Other recent / continuing work
HPD Grid - Rob
Bias Reg - Derek / Neil / Rob
I/Ls - Neil
Grid switching - Neil