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Modeling Arithmetic, Computation, and Languages
Mathematical Structures for Computer Science Chapter 8 Copyright © 2006 W.H. Freeman & Co. MSCS Slides Finite State Machines
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Finite-State Machines
The finite-state machine is a model that captures the characteristics of a computer. The behavior of our abstract machine is exhibited by the following properties: Operations of the machine are synchronized by discrete clock pulses. The machine proceeds in a deterministic fashion; that is, its actions in response to a given sequence of inputs are completely predictable. The machine responds to inputs. The machine can attain a finite number of states. At any given moment, the machine is in exactly one of these states. Which state it will be in next is a function of both the present state and the present input. The machine is capable of output. The nature of the output is a function of the present state of the machine, meaning that it also depends on past inputs. Section 8.2 Finite State Machines
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Finite-State Machines
DEFINITION: FINITE-STATE MACHINE M[S, I, O, fS, fO] is a finite-state machine if S is a finite set of states, I is a finite set of input symbols (the input alphabet), O is a finite set of output symbols (the output alphabet), and fS and fO are functions where fS: S I S and fO: S O. The machine is always initialized to begin in a fixed starting state s0. The function fS is the next-state function. It maps a (state, input) pair to a state. Thus, the state at clock pulse ti + 1, state(ti + 1),is obtained by applying the next-state function to the state at time ti and the input at time ti : state(ti + 1) = fS(state(ti ), input(ti )) The function fO is the output function. When fO is applied to a state at time ti , we get the output at time ti : output(ti ) = fO(state(ti )) Section 8.2 Finite State Machines
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Example: Finite-State Machine
A finite-state machine M is described as follows: S = {s0, s1, s2}, I = {0,1}, O = {0,1}. Because the two functions fS and fO act on finite domains, they can be defined by a state table, as in Table 8.1. The machine M begins in state s0, which has an output of 0. If the first input symbol is a 0, the next state of the machine is then s1, which has an output of 1. Section 8.2 Finite State Machines
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State Graph Another way to define the functions fS and fO (in fact all of M) is by a directed graph called a state graph. Each state of M with its corresponding output is the label of a node of the graph. The next-state function is given by directed arcs of the graph, each arc showing the input symbol(s) that produces that particular state change. The state graph for M appears in the figure below: Section 8.2 Finite State Machines
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Recognizers Finite machines can be used as recognizers because of the (limited) memory of past inputs represented by the states of a machine. A machine can be built to recognize, say by producing an output of 1, when the input it has received matches a certain description. To avoid writing down outputs, we shall designate those states of a finite-state machine with an output of 1 as final states and denote them in the state graph with a double circle. The following is the formal definition of recognition, where I* denotes the set of finite-length strings over the input alphabet. DEFINITION: FINITE-STATE MACHINE RECOGNITION A finite-state machine M with input alphabet I recognizes a subset S of I* if M, beginning in state s0 and processing an input string, ends in a final state if and only if S. Section 8.2 Finite State Machines
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Regular Sets DEFINITION: REGULAR EXPRESSIONS OVER I Regular expressions over I are the symbol and the symbol . the symbol i for any i I. the expressions (AB), (A B), and (A)* if A and B are regular expressions. (This definition of a regular expression over I is still another example of a recursive definition.) Section 8.2 Finite State Machines
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Regular Sets DEFINITION: REGULAR SET Any set represented by a regular expression according to the following conventions is a regular set: represents the empty set. represents the set {} containing the empty string. i represents the set {i}. For regular expressions A and B, (AB) represents the set of all elements of the form , where belongs to the set represented by A and belongs to the set represented by B. (A B) represents the union of A’s set and B’s set. (A)* represents the set of all concatenations of members of A’s set. Section 8.2 Finite State Machines
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Examples: Regular Expressions
Here are some regular expressions and a description of the set each one represents. 1*0(01)* Any number (including none) of 1s, followed by a single 0, followed by any number (including none) of 01 pairs 0 1* A single 0 or any number (including none) of 1s (0 1)* Any string of 0s or 1s, including 11((10)*11)*(00*) A nonempty string of pairs of 1s interspersed with any number (including none) of 10 pairs, followed by at least one 0 Section 8.2 Finite State Machines
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Kleene’s Theorem KLEENE’S THEOREM Any set recognized by a finite-state machine is regular, and any regular set can be recognized by some finite-state machine. Minimization is the process of finding, for a given finite-state machine M, a machine M with two properties: If M and M are both begun in their respective start states and are given the same sequence of input symbols, they will produce identical output sequences. M has, if possible, fewer states than M. If this is not possible, then M is already a minimal machine and cannot be further reduced. Section 8.2 Finite State Machines
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Unreachable States Unreachable states of M are those states that cannot be attained from the starting state no matter what input sequence occurs. Any of these unreachable states can be removed. Let M be given by the state table of Table 8.3. Section 8.2 Finite State Machines
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Example: Unreachable States
Although the state table contains the same information as the state graph (Figure 8.7), the graph shows at a glance that state s2 can never be reached from the starting state s0. Simply removing state s2 and its associated arcs results in the state graph of Figure 8.8 for a machine M with one less state than M that behaves exactly like M; that is, it gives the same output as M for any input string. Section 8.2 Finite State Machines
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Equivalent States DEFINITION: EQUIVALENT STATES Two states si and sj of M are equivalent if for any I*, fO(si , ) = fO(sj , ), where I* again denotes the set of finite-length strings over the input alphabet. The definition of the output function has been extended to denote the sequence of output symbols obtained by repeatedly applying fO to a sequence of input symbols. Thus, equivalent states of a machine produce identical output strings for any input string. Equivalent states partition the states of M into the corresponding equivalence classes. These classes have two properties: All states in the same class have the same output. For each input symbol, all states in the same class proceed under the next-state function to states that are all in the same class. Section 8.2 Finite State Machines
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Minimization The minimization problem for M boils down to finding the equivalent states of M. Unfortunately, the obvious approach of directly trying to satisfy the definition of equivalent states will not work. Given two states si and sj of M, we cannot actually compare the outputs corresponding to each possible input string. Fortunately, the problem is not as infinite as it sounds; we only need to identify k-equivalent states. DEFINITION: k-EQUIVALENT STATES Two states si and sj of M are k-equivalent if for any I*, where has no more than k symbols, fO(si, ) = fO(sj , ). Section 8.2 Finite State Machines
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Example: k-Equivalent States
Let M be defined by the state table of Table 8.5. (Here we’ve started writing 0, 1, for states instead of s0, s1, s2,... . ) The 0-equivalence classes of the states of M are {0, 2, 5} and {1, 3, 4, 6} To find 1-equivalent states, look for 0-equivalent states with 0-equivalent next states. For example, the states 3 and 4 are 0-equivalent; under the input symbol 0, they proceed to states 1 and 6, respectively, which are 0-equivalent states, and under the input symbol 1 they both proceed to 5, which of course is 0-equivalent to itself. Therefore, states 3 and 4 are 1-equivalent. Section 8.2 Finite State Machines
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Example: k-Equivalent States
But states 0 and 5, themselves 0-equivalent, proceed under the input symbol 1 to states 3 and 0, respectively, which are not 0-equivalent states. So states 0 and 5 are not 1-equivalent; the input string 1 will produce an output string of 01 from state 0 and of 00 from state 5. The l-equivalence classes for M are {0, 2},{5},{1, 3, 4, 6}. To find 2-equivalent states, we look for 1-equivalent states with 1-equivalent next states. States 1 and 3, although 1-equivalent, proceed under input 1 to states 2 and 5, respectively, which are not 1-equivalent states. Therefore, states 1 and 3 are not 2-equivalent. The 2-equivalence classes for M are {0, 2},{5},{1, 6},{3, 4}. The 3-equivalence classes for M are the same as the 2-equivalence classes. The total procedure for finding equivalent states is to start with 0-equivalent states, then l-equivalent states, and so on, until the partition no longer subdivides. Section 8.2 Finite State Machines
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Minimization Algorithm
Minimize (finite-state machine table M) //produces a minimized version of M Local variable: boolean flag //flag for loop exit when nonequivalent states found find 0-equivalent states of M repeat while untested equivalence classes remain do select untested equivalence class while untested state pairs in current class remain do select untested state pair in current class flag = false while untried input symbols remain and not flag do select untried input symbol Section 8.2 Finite State Machines
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Minimization Algorithm
for both states in current pair, find next state under current input symbol if next states not equivalent then flag = true end if end while if flag then mark current states for different classes; form new equivalence classes until set of new equivalence classes = set of old equivalence classes end Minimize Section 8.2 Finite State Machines
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Example For the machine M of the example on the previous slide, the reduced machine M will have states: A = {0, 2}; B = {5}; C = {1, 6}; D = {3, 4} The state table for M (Table 8.6) is obtained from that for M. Machine M (starting state A) will reproduce M’s output for any input string, but it has four states instead of seven. Section 8.2 Finite State Machines
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Example Minimize M where M is given by the state table of Table 8.7.
The 0-equivalence classes of M are {0, 2, 4}, {1, 3} The 1-equivalence classes of M are {0}, {2, 4}, {1, 3} No further refinement is possible. Let: A = {0}, B = {2, 4}, C = {1, 3} The reduced machine is shown in Table 8.8. Section 8.2 Finite State Machines
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Sequential Network A delay element is the simplest of a class of elements known as flip-flops. It is regulated by a clock, has a single binary input, and its output at time t + 1 is the input signal it received at time t. The delay element is therefore a “memory device” that captures input for the duration of one clock pulse. Figure 8.9 represents the delay element at time t + 1, with the signal propagating from right to left. When one or more delay elements are introduced into a combinational network, the network is known as a sequential network. Section 8.2 Finite State Machines
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