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Andes Technology Innovate SOC ProcessorsTM

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Presentation on theme: "Andes Technology Innovate SOC ProcessorsTM"— Presentation transcript:

1 Andes Technology Innovate SOC ProcessorsTM

2 Embedded System Development Flow
ANDES Confidential

3 Design methodologies A procedure for designing a system.
Understanding your methodology helps you ensure you didn’t skip anything. Compilers, software engineering tools, computer-aided design (CAD) tools, etc., can be used to: ANDES Confidential

4 Embedded System Development Flow
Target SW Compiler Assembler/Linker Debugger Tool chains Application Layers Middle ware Generic Drivers App Drivers OS/Kernel Libraries SW SoC Definition HW Andes Virtual Platform Your Virtual SoC Application Models Essential IP’s Models AndesCore Customer SoC High Level Modeling Add AICE™, ADP-AG101™, and ADP™-XC5 in v1.3.3 SoC Evaluation Board Application IPs Essential IPs AndeScore Customer SoC Logic Design ANDES Confidential

5 ANDES Confidential

6 Characteristics of Embedded Systems
Sophisticated functionality. Real-time operation. Low cost. Low power. Designed to tight deadlines by small teams. ANDES Confidential

7 SOC (System On Chip) Characteristics
A complete system manufactured on a single IC Usually includes a processor, memories, peripherals and interfaces May require mixed mode (digital and analog) semiconductor technology Components are typically modulated and IP form ANDES Confidential

8 SOC (System On Chip) (cont.)
Advantages Cost Power Versatility with IP uses Disadvantages Availability of IPs Compatibility of IPs Verification/Testing issues Packaging and heat dissipation ANDES Confidential

9 SOC (System On Chip) (cont.)
Key design issues Process technology OS Non OS Mix-mode Communications and interfaces AMBA Local BUS System architecture and integration OS kernal Low power Real-time computing Application domain knowledge ANDES Confidential

10 Andes Embedded™ ANDES Confidential

11 Andes Embedded Solution
AndeStar™ Andes 16/32-bit Mixable ISA AndesCore™ CPU Core Family AndESLive™ ESL Integrated Virtual Environment Andes Embedded™ AndeShape™ SoC + EVB + ICE AndeSight™ Integrated Development Environment AndeSoft™ Optimized Target SW such as Linux/RTOS, Middleware, and Application Software. ANDES Confidential

12 AndesCore™ – Configurable Options
Cache: Instruction queue size: 2/4/8 8KB ~ 64KB, 1/2/4 ways 16B/32B cache line size Replacement policy: Pseudo LRU or random Local Memory: Internal or external, 4KB ~ 1MB Memory Management Simplest 2/4 partitions MPU with 8 segments MMU microTLB size: 4/8 entries mainTLB size: 32/64/128 entries Page table walking: hardware or software Bus interfaces: AHB/AHB-Lite/APB/AMI HSMP bus Instruction extensions: Audio extensions Performance extensions Floating co-processor String processing acceleration User-defined extensions Debugging support: Embedded Debug Module with HW breakpoints Embedded Program Tracer Embedded performance monitor Core: Big/little endian Static/Dynamic branch prediction BTB size: 32/64/128/256 entries 2/3 nested interrupt levels 16/32 GPRs 2R1W/3R2W register file ANDES Confidential

13 Summary Embedded computers are all around us.
Many systems have complex embedded hardware and software. Embedded systems pose many design challenges: design time, deadlines, power, etc. Design methodologies help us manage the design process. ANDES Confidential

14 Thank You!!!


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