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VLSI Physical Design Automation

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Presentation on theme: "VLSI Physical Design Automation"— Presentation transcript:

1 VLSI Physical Design Automation
Detailed Routing (III) Prof. David Pan Office: ACES 5.434

2 Channel/Switch Box Routing Algorithm
Graph theory based algorithm Yoshimura and Kuh Greedy algorithm Rivest and Fiduccia Maze routing and its variations Lee, Robin, Soukup, Ohtsuki Hierarchical wire routing Burstein and Pelavin Channel routing Channel / switchbox and general area routing

3 Over-the-Cell Routing
Channel width can be reduced if some nets can be routed outside the channel. The metal layers available over the cell rows can be used for routing. (It is possible due to the limited use of the M2 metal layer within the cells.) Commonly used in standard-cell design.

4 Two-Layer Over-the-Cell Router
“Over-the-Cell Channel Routing”, J. Cong and C. L. Liu, TCAD, pages , 1990.

5 Boundary Terminal Model (BTM)
Terminal Rows VDD GND

6 The Routing Problem Boundary Terminal Model (BTM)
Two routing layers in the channel. One routing layer for over-the-cell routing, so the routing must be planar. 1 2 1 5 2 5 4 3 4 3 5 2 1 4 1 5 3 6 5 6 3 3

7 Hyper-terminal A Hyper-terminal is a set of terminals connected by over-the-cell wires. Hyper-terminals: {A,C}, {B}, {D,F,K}, {E}, {G,I}, {H}, {J} A B C D E F G H I J K 1 2 1 5 2 5 4 3 4 3 5 2 1 4 1 5 3 6 5 6 3 3 L M N O P Q R S T U V Hyper-terminals: {L}, {M,O}, {N}, {P}, {Q,U,V}, {R,T}, {S}

8 Three Steps of the Algorithm
Routing over the cells. Select a net segment from each multi-terminal net to be connected in the channel. Routing in the channel.

9 Routing Over the Cells Reduced to a Multi-Terminal Single-Layer One-Sided Routing Problem (MSOP). Solved by dynamic programming.

10 MSOP The fewer the number of hyper-terminals resulted, the simpler the subsequent channel routing problem. Routing a row of terminals using a single routing layer on one side of the row such that the number of hyper-terminals is minimized. ? 1 2 1 5 2 5 4 3 4 3 5 Can you give a solution for this instance?

11 MSOP Case 1: M(i, j) = ??? Case 2:
Can be solved by dynamic programming. Consider the sub-problem from column i to j. Let M(i, j) be the maximum reduction in the number of hyper-terminals from i to j. i i+1 j No nets at i or the net is not connected to [i,j] Net p p1 p2 Case 1: M(i, j) = ??? Case 2:

12 MSOP No nets at i or the net is not connected to [i, j] Case 1:
Net p p1 p2 Case 1: M(i, j) = ??? Case 2: Putting the two cases together: M(i, j) = ???

13 MSOP Algorithm For i = 1 to n M(i, i) = 0; For j = ?? to ??
Let n be the total number of pins on the row. MSOP algorithm: For i = 1 to n M(i, i) = 0; For j = ?? to ?? For i = ?? to ?? Compute M(i, i+j) Return M(1, n)

14 Runtime of MSOP Let n be the total number of columns. For each (i, j), M(i, j) can be found in O(?) time. There are O(n2) pairs of (i, j). So: Total time = O(?)

15 Selection of Net Segment
Need to determine which terminal within a hyper-terminal to be used in the subsequent channel routing. Can be transformed to a special spanning forest problem. 1 1 Pick one out of four 1 1

16 Connectivity Graph 31 32 33 a connected component column
A weighted multi-graph. Each hyper-terminal is represented by a vertex and each net is re-presented by a connected component. [8,10] 31 32 33 a connected component 2 1 5 4 3 6 7 8 9 10 11 Take net 3 as an example: column [6,8] [8,10] [8,11] [6,10] [10,10] [10,11]

17 Minimum Density Spanning Forest Problem (MDSFP)
Want to connect hyper-terminals of the same net together. That is, finding a spanning tree for each connected component, or finding a spanning forest for the whole connectivity graph. The goal is to minimize the channel density. This problem is NP-Complete. Efficient heuristic is proposed.

18 Heuristic for MDSFP For each edge e, let r(e) = d(e)/D, where d(e) is the density of the interval associated with edge e and D is density of the whole channel. r(e) measures the relative degree of congestion over the interval associated with e. The heuristics repeatedly removes edges of high r() from the connectivity graph until a spanning forest is obtained. The value of r(e) for each edge e is updated after each removal.

19 Via Minimization In VLSI fabrication, the yield is inversely related to the number of vias. Every via has an associated resistance that affects the circuit performance. The size of a via is usually larger than the width of a wire. As a result, more vias will lead to more routing space.

20 Two Different Problems
Constrained Via Minimization (CVM) Unconstrained Via Minimization (UVM)

21 Constrained Via Minimization (CVM)
Given a detailed routing solution, minimize the number of vias by assigning wire segments to different layers. Vias occur only at the turning points. Also called the Layer Assignment Problem. 2 3 4 5 1 2 3 4 5 1

22 Unconstrained Via Minimization (UVM)
Minimize the number of vias during routing. Vias can occur anywhere as needed. Consider an unreserved layer model for routing (both vertical and horizontal wires can be routed on the same layer in each region).

23 Topological Routing Topological Routing Geometric Mapping
UVM is also known as Topological Routing. Topological Routing Geometric Mapping

24 CVM and UVM UVM is less popular than CVM since via minimization is usually considered secondary. Minimization of channel width, completion of routing, and minimization of total wirelength are considered more important. Note: modern routers usually will follow “preferred” layers. So via minimization essentially is to minimize the number of “bends”. We will show CVM just to illustrate some algorithmic aspects of via minimization.

25 CVM by Reduction to Maximum Cut Problem
“Optimal Layer Assignment for Interconnect”, R. Y. Pinter, IEEE Int’l Conf. Circuits and Computers, pages , Sept

26 Overview For two routing layers.
Partition the routing region into clusters such that no “junction” is of degree more than 3. The problem can be transformed to finding a maximum cut in a graph.

27 Cluster Graph Representation
1 2 3 4 5 4 S1 S2 S6 S3 S4 S5 S7 h1 h2 h3 h5 h7 h8 Cluster Graph 2 1 3 5 S1 Cluster 1 2 3 4 5 4 S3 S4 S2 h7 h3 h4 h6 S5 h8 h1 h2 h5 S6 S7 Via 2 1 3 5

28 Layer Assignment Class C1: Horizontal wires on layer 1
In every cluster, there are only two possible ways to assign layers. Class C1: Horizontal wires on layer 1 Vertical wires on layer 2 Class C2: Horizontal wires on layer 2 Vertical wires on layer 1

29 Assign Clusters to C1 and C2
If two adjacent clusters are in the same class, the via candidates joining them are needed. If two adjacent clusters are in different classes, the vias candidates joining them are not needed. Same Class Different Classes C2 C2 C2 C1

30 Example of Class Assignment
Cluster Graph S1 S3 h7 C1 h1 h3 S4 C2 S2 C2 S5 C1 S6 C1 h5 h2 S7 h8 1 2 3 4 5 4 S3 S4 h7 Original: 8 vias This solution: 4 vias S1 h3 h4 h6 S2 S5 h8 h1 h2 h5 S6 S7 2 1 3 5

31 Example of Class Assignment
h7 A better solution: C2 h1 h3 S4 C1 S2 C1 S5 C2 S6 C2 h5 h2 S7 h8 2 3 4 5 1 S6 h1 h2 h3 h4 h5 h6 h7 h8 S1 S2 S3 S4 S5 S7 Optimal Solution: 2 vias

32 Class Assignment Problem
No. of vias = No. of via candidates – No. of edges connecting a vertex in C1 and a vertex in C2 S1 S2 S6 S3 S4 S5 S7 C1 C2 Optimal Solution S1 S2 S6 S3 S4 S5 S7 C1 C2 No. of edges here = no. of vias that can be eliminated

33 Maximum Cut Problem A cut Maximum cut = A cut with the maxi-
The layer assignment problem is equivalent to the Maximum Cut Problem of a graph. The Maximum Cut Problem is NP-Complete for general graphs. Solvable in polynomial time for planar graphs. [Hadlock 1975, SIAM Journal on Computing] Cluster graphs are planar. A cut Maximum cut = A cut with the maxi- mum no. of edges

34 Other Routing Issues Gridless Routing Multi-level routing DSM effects

35 Gridless Detailed Routing
Gridless Routing More flexible Longer runtime due to complex data structure Gridless Detailed Routing Algorithms Shape (Tile) based routing [Sato, et al., ISCS87, Margarino, et al., TCAD87, Dion, et al., WRL Research Report 95/3, Liu, et al., ISPD98] Graph-based routing [Wu, et al., TC87, Ohtsuki, ICCAS85, Cong, et al., Zheng, et al., TCAD96, ICCAD’99] Subgrid routing [US Patent, 6,507,941 B1, Jan. 2003]

36 Multilevel Routing Framework (MARS [TCAD05])
Detailed routing Fine routing tile generation Implicit graph gridless routing G0 G0 G1 G1 Gk Coarsening Refinement History-based iterative refinement This is the framework of MARS. It is a very typical “v” shaped multilevel optimization framework with a downward coarsening pass and an upward refinement pass. The circuit is first partitioned into small tiles. At every coarsening level, the tiles are coarsened, and a sub-problem of the original routing problem is derived at that level. The actual routing process starts at the coarsest level, and then the results are refined at every level. We can also see this as the sub-problem at each level is solved with the guide from the previous result. Because of this hierarchical structure, MARS is more scalable. Also, multilevel framework provides a framework of integrating different optimization algrorithms at different levels. In MARS, a MCF-based routing algorithm is used in initial routing, a history based iterative refinement is used in refinement levels, and a gridless detailed router with implicit routing graph is used at the finest level. Multicommodity flow based algorithm Initial routing [Courtesy Prof. Jason Cong]

37 DSM Considerations Antenna effects Crosstalk noise
Interconnect optimization & planning Manufacturability …… Will be covered in EE382V, Optimization Issues in VLSI CAD


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