1. same for both sectors 45 and 56
CT-PPS Motherboard (1)
General Schema
same for both sectors 45 and 56
Clock
Distribution
Clock
System
Clock
DOHM
FEC
Control
Control
Detectors
Detectors
LV/HV
Detectors
Tracker FED
Detectors
CT-PPS MB
Data
TOTFED
OptoRX
and
MicroTCA
Data
~2m
Trigger
~80m
Alcove
Power Supply HV HV LV
DCS/DSS
DCS/DSS
TUNNEL
~250m
USC

2. Commands Distribution
CT-PPS Motherboard (2)
Basic Blocks
FPGA
SoC M2S150-FCG1152
MICROSEMI
INPUT
OUTPUT
Connectors
for Control
CCUM
Clock and
Commands Distribution
Connector
for
HPTDCs Mezzanine
GOHs
Connectors
for
SAMPIC
Mezzanines +
Flash EPROM
POH
QuickUSB Mezzanine
Power Distribution
JTAG Port

3. CT-PPS Motherboard (3)
SAMPIC Mezzanine
POH Mezzanines

4. CT-PPS Motherboard (4)
FPGA type

5. CT-PPS Motherboard (5)
Schematic

6. CT-PPS Motherboard (6) Status 1 To be defined
What to use CCU25 chip or CCUM mezzanine
CCU25 chip – no answer yet for availabilities
CCUM mezzanine – available
Using CCU25 chip provide more functionalities (JTAG, etc.)
POH transmitters - which to use, number of channels?
HPTDC mezzanine dimensions
SAMPIC mezzanine final version
Power distributions on board (for FPGA, detectors, etc.)
DCS information (temp, vacuum, radmon, etc.) !

7. CT-PPS Motherboard (7) Status 2 Schematic drawing is ongoing
Defining the connectivity to the front-end and outside electronics is ongoing
Components selection is ongoing
PCB layout time is reserved at CERN
Very preliminary plan
Components ordering now
SCH to be finished mid of May 2015
PCB layout to start after SCH / FPGA verification beg of June 2015