1. Silicon Lab Bonn Physikalisches Institut Universität Bonn
DEPFET Test System
Test DESY
H. Krüger, EUDET Brainstorming, 3/

2. DEPFET Prototype System
DEPFET sensors
64 x 128 pixels, 36,5 x 28 µm2
(Q1 2007: 512 x 512 pixels, 33 x 24 µm2)
Event rate
old system: 10 Hz (various limitations)
new system: ~1 kHz (w/o zero supp.), data transfer limited (20 Mbyte/s, USB 2.0)
with zero suppression: ~100 kHz (theor.), row clock rate limited (10 MHz)
DAQ
USB 2.0 interface to Win2k/XP PC
independent processes for slow control, file writing and online-monitoring
inter-process communication via ‘shared memory’ buffers
H. Krüger, EUDET Brainstorming, 3/

3. Read-out System Hardware
Hybrid
DEPFET matrix
2 Switcher + Curo
2 transimpedance amplifiers
S3A Board
Mixed signal board
Dual 65 MHz ADCs
FPGA + 256k SRAM
USB 2.0 interface card
H. Krüger, EUDET Brainstorming, 3/

4. BAT Bonn ATLAS Telescope
four planes of double sided strip detectors
640 x 640 ch.
50µ pitch
analog r/o
VA1 / VA2 chips
S/N ~40-70
spatial resolution: 4-5 µm
on-module zero suppression
event rate: max. 8 kHz
PCI interface card
DAQ SW for Win2k/XP
H. Krüger, EUDET Brainstorming, 3/

5. Test Beam Setup with BAT and DEPFET
Trigger Logic Unit
Trigger to modules
BAT modules
DEPFET
BAT modules
TLU
Busy from modules
trigger
Blue Board Bus (BBB)
PCI interface
Win XP
USB interface
H. Krüger, EUDET Brainstorming, 3/

6. Test Beam DAQ Structure
See talk by Peter Fischer
H. Krüger, EUDET Brainstorming, 3/

7. Results from DEPFET TB @ DESY August 2005
noise ~230 e
S/N ~140 (450 µm thick detector)
purity 96.3%
efficiency 99.3%
5σ seed cut
H. Krüger, EUDET Brainstorming, 3/

8. Results from DEPFET TB @ DESY August 2005
Limitations:
low frame rate ~10Hz limited by (old) test setup and
low electron 6 GeV
spatial residuals ~10 µm (expected 2-4 S/N 144) dominated by multiple 6 Gev e- beam
H. Krüger, EUDET Brainstorming, 3/

9. Wish List Beam Telescope Mechanics & Cooling Trigger
highest possible energy (> 6 GeV)
moderate to high flux (adjustable)
variable bunch structures ?
Telescope
resolution < 2 µm, area min. 1 x 2 cm2
low (almost no) material
minimum (adjustable) distance between telescope modules
high event rate (~ O(kHz))
Mechanics & Cooling
positioning system for DUT (x, y, theta), < 1 µm x-y resolution
cooling: yes, but common schema feasible?
Trigger
different scintillator sizes to adapt to DUT active area
configurable trigger interface to connect to DUT (Trigger, Busy, BOR)
event by event r/o or buffered r/o
H. Krüger, EUDET Brainstorming, 3/

10. Wish List cont. Telescope DAQ and integration issues …
H. Krüger, EUDET Brainstorming, 3/

11. Integration of Telescope and DUT on HW Level
sensors and FE electronic
first level interconnect
digitalization & sparsification with common DAQ HW (adopted for DUT)
COTS interface (Gbit-Ethernet, USB, S-LINK, cPCI, VME…)
common DAQ control, slow control, file writer (PC, SBC…)
proprietary bus
Trigger
DAQ HW
standard bus interface
interface
DAQ ctrl
computer
file
H. Krüger, EUDET Brainstorming, 3/

12. Integration of Telescope and DUT on SW Level
sensors and FE electronic
first level interconnect
digitalization & sparsification with dedicated DAQ HW
COTS interface (Gbit-Ethernet, USB, S-LINK, cPCI, VME…) can be different
still common DAQ control, slow control and file writer but different interfaces
Trigger
DAQ HW
standard bus interfaces
intfc
intfc
DAQ ctrl
computer
file
H. Krüger, EUDET Brainstorming, 3/

13. Integration of Telescope and DUT on Data Level
sensors and FE electronic
first level interconnect
digitalization & sparsification with dedicated DAQ HW
COTS interface (Gbit-Ethernet, USB, S-LINK, cPCI, VME…) can be different
independent DAQ control, common file writer, running on one or two machines with inter-process communication (shared memory buffers, TCP/IP)
Trigger
DAQ HW
standard bus interfaces
intfc
intfc
computer
tel. ctrl
IPC
DUT ctrl
file
H. Krüger, EUDET Brainstorming, 3/

14. Discussion
common omni purpose DAQ (standardized, well documented and maintained, cheap…) would be the ultimate goal
but: most of the users already have their DAQ (or at least lab test-setups)
they should not be forced to re-design their setup if they want to use
integration on SW level is difficult or impossible due to different operating systems
integration on ‘data-level’ seems to me most flexible, users can stick to their known DAQ
needs definition and implementation of IPC (via TCP/IP or shared memory buffers), control protocol and common data format
+ four LEMO cables for trigger, busy, reset and “something else”
H. Krüger, EUDET Brainstorming, 3/