1. Presentation P2 System Design Preliminary Detailed Design
Objectives
Compile System Design Portion of your Final Presentation
Compile Preliminary Block Detailed Design
Presentation P2 in Lab ~50 Minute Time Limit Per Team Come to Lab with 1 Consolidated File per Team Memory Stick or CD

2. Reuse: Project Proposal Presentation P1
Team Deliverable
Reuse the following slides for P2 (leave out lined items)
All Project Proposals including block diagrams
Team Roster and Background Slides
Recommended Project Description
High Level or User Requirements – What does it do for user?
Perf Requirements Summary
Std Requirements Summary
Basic Business Case
Refined Block Diagram - Block Diagram Description Page
Requirements Spreadsheet: Project Level Tabs (Excel File)
Requirements Spreadsheet: Block Level Tab Flowdowns (Excel File)
1 Page on 3 Key Patents Found for Product Area – Mitigation Plan
1 Page on Key Ethical/Societal Risk Areas – Mitigation Plan
Labs 1A-B
Lab 1C

3. Team Deliverable – Add Product Level Slides
Presentation P2
Team Deliverable – Add Product Level Slides
Product Safety Mitigation Slides – Lab 2
Product EMC Mitigation Slides – Lab 2
Product Level Design Plan Summary & Gantt Chart Slides – Lab 3
Overall Prototype Plan, Interconnection Strategy – Lab 3

4. Individual Deliverable - Block Level Slides
Presentation P2
Individual Deliverable - Block Level Slides
Block Description and Purpose Slide – New
Block Performance Requirements, Allocated/Associated - New
Block Standard Requirements, Allocated/Associated – New
Block Signal Input/Output Summary Slide(s) – Lab 1C
Block Diagram Breakdown Slide (Block Diagram of the Block) - New
Block Preliminary Schematic - New (Product Design !)
3-4 Bullets on Theory of Operation
Block Preliminary Bill of Materials (BOM) – New (Product Design !)
Block Detailed Design Calculations & Component Selection – New
See Next Page
For Each Block
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Required
Slides
Complete as much as possible to present in lab next week (prior to lab)

5. Presentation P2 Detailed Design Calculations & Component Selections
Additional Block Detailed Design Slide Content
Detailed Design Calculations & Component Selections
Device Package Type Rationale
Nominal Resistance, Capacitance, Inductance Values & % Tolerance Calculations
Resistor Compositions, Capacitor Dielectric, Inductor Winding; Selection Rationale
Resistor, Capacitor, Inductor, Diode, Transistor & IC Max Voltage Calculations
Resistor, Inductor, Transistor, Diode, Xfmr, & IC Max Power Calculations
Power Electronics Heat Sink qj Calculations and Max Die Temp Rise Above Ambient
EMC Devices including filters, ferrites, transient absorbers, etc
Safety Devices such as Current Limiters incl Fuses, Breakers, GFCI, etc
Wire Gauges, Interconnect Contact, & Trace Width Ratings
Op-Amp Selections including Ib, Vio, CMRR, Slew Rate, Iout & Error Voltage Calculations
Logic Family Selection including Interface Compatibility, Speed, Power
CPU and/or PLD Types and Clock Speed, Performance Capabilities
Regulator Basic Performances incl % line and % load regulations
Nominal Time Domain Operational Simulations
Nominal Frequency Domain Operational Simulations
Worst Case or Monte-Carlo Simulations
Additional Analog Circuit DFM Analysis as applicable
Justify your component selections as you design!