1. ECE 3430 – Intro to Microcomputer Systems
ECE 3430 – Introduction to Microcomputer Systems University of Colorado at Colorado Springs
Lecture #7
Agenda Today
Decoding Machine Code
Logical Instructions (AND, OR, exclusive OR, …)
Arithmetic Instructions (addition, subtraction, multiplication, division)
Performing integer multiplication and division
More Instruction Execution and Timing
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

2. ECE 3430 – Intro to Microcomputer Systems
Decoding Machine Code
- The process of creating the assembly language (including mnemonics) for the
instruction codes and operands scattered throughout program memory (the machine code).
- If we know the contents of the program memory, we can reverse-engineer the
code to assembly level.
- There is a single mapping from machine code to assembly code and
vice-versa.
- FYI: It is not always possible to reverse-engineer machine code to a source
code form more abstract than assembly (i.e. to the C or C++ source code level).
Information is combined and dismissed during the “higher level language” to
assembly translation. There can be an infinite number of ways to write higher
level code that ultimately produces the same machine code. Debuggers for
these higher level languages rely on other constructs (such as symbol files)
to map a particular machine instruction back to a single line of source code.
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

3. ECE 3430 – Intro to Microcomputer Systems
Decoding Machine Code
Program Execution:
The instruction code (IC) contains all the information about size and addressing mode of the
instruction.
The IC inherently tells you where the next IC is stored in memory—and so on.
Just as assemblers can assemble your assembly code into machine code, inverse-assemblers
can take machine code and produce the original assembly code.
Why would you want to do this? 1) To verify that the cross-assembler did what you expected ) If the address & data busses are “probe-able”, you can use
a logic analyzer to track the program and find our where
the programs are and what they are doing (nicer logic analyzers
have “built-in” inverse assemblers for many common CPUs). .
The MSP430 Instruction Set Encodings link tells you the IC for a given mnemonic and addressing
mode. You can use this to look up the opposite.
*.s43 file
Program Memory
cross-assembler
mov.b &2,R6
0x4256 0x0002
*.s43 file
mov.b &2,R6
inverse-assembler (machine code decoding)
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

4. ECE 3430 – Intro to Microcomputer Systems
Decoding Machine Code
Decode the following: 0x x ) First we look up 0x4075 in the MSP430 Instruction Set Encodings. The first nybble “4”
indicates a mov operation. 2) According to the datasheet format, the next 4 bits represents the source register (0 in
this case).
3) The next 4 bits indicate a combination of source and destination addressing mode and
the size of the operation:
Ad(0):B/W(0):As(1:0)
7 = 0111b
Ad = 0  register direct
B/W = 1  8-bit (byte)
As = 11  register indirect autoincrement
4) The last 4 bits indicate the destination register (5 in this case).
At this point we know the source line was:
R0 = PC so   mov.b #0033h,R5
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

5. ECE 3430 – Intro to Microcomputer Systems
Decoding Machine Code
Decode the following: 0x1A 0x42 0x7A 0x00 1) First we look up 0x421A in the MSP430 Instruction Set Encodings. The first nybble “4”
indicates a mov operation. 2) According to the datasheet format, the next 4 bits represents the source register (2 in
this case).
3) The next 4 bits indicate a combination of source and destination addressing mode and
the size of the operation:
Ad(0):B/W(0):As(1:0)
1 = 0001b
Ad = 0  register direct
B/W = 0  16-bit (word)
As = 01  register indexed
4) The last 4 bits indicate the destination register (10 in this case).
At this point we know the source line was: mov.w ?(R2),R10
R2 = SR = CG1 (zero generator) so offset ‘?’ is absolute. Operand provides ‘?’ as 16-bit.
 mov.w 007Ah(R2),R10  mov.b &007Ah,R10
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

6. ECE 3430 – Intro to Microcomputer Systems
Decoding Machine Code
Decode the following: 0x56 0x40 0x1B 0x1E 1) First we look up 0x4056 in the MSP430 Instruction Set Encodings. The first nybble “4”
indicates a mov operation. 2) According to the datasheet format, the next 4 bits represents the source register (0 in
this case).
3) The next 4 bits indicate a combination of source and destination addressing mode and
the size of the operation:
Ad(0):B/W(0):As(1:0)
5 = 0101b
Ad = 0  register direct
B/W = 1  8-bit (byte)
As = 01  register indexed
4) The last 4 bits indicate the destination register (6 in this case).
At this point we know the source line was: mov.b ?(R0),R6
R0 = PC. Operand provides ‘?’ as 16-bit.
 mov.b 1E1Bh(PC),R6  mov.b <label at PC+1E1Bh>,R6
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

7. Bit-Wise Manipulation of Memory
The MSP430 is a byte-addressable architecture.
This means that each address targets a byte
stored in memory. So what if you want to
change one bit in memory (without effecting
the other bits in that byte)?
Apply boolean logic:
AND: Force a bit to zero or no change.
OR: Force a bit to one or no change.
Exclusive OR (XOR): Toggle a bit to opposite state or no change.
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

8. Bit-Wise Manipulation of Memory
There is no explicit OR instruction in the MSP430 instruction set.
Note there is an AND and XOR instruction.
To perform an OR operation, use the BIS instruction.
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

9. Bit-Wise Manipulation of Memory
The AND, BIS, and XOR instructions conceptually form a logic gate
between each corresponding bit of the operand and the value
already stored in the register.
The source and destination obey by this logic:
destination = source <op> destination
Like the mov operation, the source can use any of the 4 fundamental addressing modes—while the destination can only use register direct and register indexed.
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

10. Bit-Wise Manipulation of Memory
The AND, BIS, and XOR instructions conceptually form a logic gate
between each corresponding bit of the operand and the value
already stored in the register. These logical operations can be
performed directly on memory if desired.
and <src>,<dest>  bitwise AND
x x x x x x x x
bis <src>,<dest>  bitwise OR
xor <src>,<dest>  bitwise exclusive OR
Logic Gate
8 or 16 of these (depending on size specified)
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

11. Bit-Wise Manipulation of Memory
These logical instructions are useful for setting, clearing, or toggling bits within a byte: OR w/ 1 to set mov.b &P1OUT,R4 bis.b # b,R mov.b R4,&P1OUT
 will force P1.4 to ‘1’ AND w/ 0 to clear and.b # b,&P1OUT
 will force P1.4 to ‘0’
XOR w/ 1 to toggle xor.b # b,&P1OUT
 will toggle the state of P1.4
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

12. Bit-Wise Manipulation of Memory
AND operation also useful for bit masking. For example, compare the state of only the least-significant 4 bits of a byte  mask off the upper 4 bits.
XOR is useful for a quick, efficient comparison for equality. A single XOR gate is a 1-bit digital comparator.
 xor.w R4,R5 (R5 will be zero if the contents of R4 and R5 are the same)
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

13. ECE 3430 – Intro to Microcomputer Systems
Carry Flag and the MSP430
The carry flag (C-flag) in the SR always represents a carry condition in
this architecture.
During addition, it represents whether or not an unsigned overflow condition has
occurred.
During subtraction, it represents whether or not a larger value has
been subtracted from a smaller value when the two values (of equal
precision) as both considered unsigned.
A “carry” and “borrow” condition are always inverses.
When the carry flag is 0 following a subtraction, a “borrow” has occurred
(smaller – larger).
When the carry flag is 1 following a subtraction, a “borrow” has not occurred
(larger - smaller).
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

14. Arithmetic Instructions: The ADD Instruction
ADD – binary add instruction.
ADDC – binary add instruction with carry.
ADC – add carry to destination.
Can natively do 8 and 16-bit binary addition.
Greater than 16-bit requires multi-precision arithmetic.
Example add instructions:
add.w R5,R6 ; R5 + R6  R6
add.w 4(R4),R7 ; M(R4 + 4) + R7  R7
; M(R7) + R8 + C-flag  R8
adc.b R7 ; R7 + C-flag  R7
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

15. Arithmetic Instructions: The ADD Instruction
ADD Instruction Execution – Ex) add.w 4(R2),R7
(2 words, 3 clock cycles) Step 1: PC is put on the address bus (E000h) and a READ is initiated. The data (5417h) is put on the data bus by the memory and grabbed by the CPU. The control unit decodes the instruction code and recognizes the instruction, src and dest addressing modes, and
size of operation.
The PC is incremented by 2 (PC = PC + 2 = E002h). Step 2: PC is put on the address bus (E002h) and a READ is initiated. The data (0004h) is put on the data bus by
memory and grabbed by the CPU. The PC is incremented
(PC = PC + 2 = E004h). Step 3: The address (R2+0004h) is put on the address bus (by uC) and
the data at that address is put on the data bus (by memory).
This value is added to R7 and the result latched into R7.
Memory
R2+0004h data
E000h h
E001h h
E002h h
E003h h
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

16. Arithmetic Instructions: The ADD Instruction
Write 8-bit code to add M(0010h) and M(0011h) and store in M(0012h) – mov.b h,R10 ; upper 8 bits of R10 are cleared
add.b h,R ; lower 8 bits used in add, upper 8 stay 0
mov.b R10,0012h ; writes only the lower 8 bits out to memory
The above would add the contents of 0010h and 0011h together. The sum resides in
R10 until we store the result out to memory. In this case the result is stored
in memory location 0012h.
Even though the data bus is 16-bits wide, only 8 bits are accepted by the memory
in this case. In other words, memory location 0013h is unaffected.
Could one replace the .b with .w to turn everything into 16-bit addition? Any problems
doing that?
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

17. Arithmetic Instructions: The SUB Instruction
SUB – binary subtraction.
SUBC – binary subtraction with borrow.
SBC – subtract borrow from destination.
Example subtract instructions:
sub.w R5,R6 ; R6 - R5  R6
sub.w 4(R4),R7 ; R7 - M(R4 + 4)  R7
; R8 - M(R7) - ~C-flag  R8
sbc.b R7 ; R7 - ~C-flag  R7
See the MSP430 Instruction Set Summary link to see how the MSP430
actually performs these operations. They re-word these operations in
terms of addition—but conceptually accomplishes the same thing.
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

18. Arithmetic Instructions: The SUB Instruction
What happens if the result is negative?  The “N” bit in the SR is set.
What happens if two’s compliment overflow occurs?  The “V” bit in the SR is set.
What happens if the result is zero?
 The “Z” bit in the SR is set.
What happens if a larger unsigned value is subtracted from a smaller unsigned value?
 The “C” bit is cleared. It is set on larger – smaller.
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

19. Arithmetic Instructions: Multiplication
Some CPU architectures have support for an integer multiply instruction.
Some have unsigned integer only and some have signed and unsigned
integer multiply instructions.
Some have floating point and some don’t. Most uC CPUs do not have floating point support.
Some have 8-by-8, some 16-by-16, some 16-by-8, et cetera.
None of the MSP430 CPUs have native support for multiplication.
Some versions of the MSP430 have a hardware multiplier (dedicated hardware outside of the CPU) to pull off multiplication.
Our MSP430 in the lab does not have a hardware multiplier—so multiplication must be done in software.
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

20. Arithmetic Instructions: Multiplication
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

21. Arithmetic Instructions: Multiplication
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

22. Arithmetic Instructions: Multiplication
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

23. Example of a Hardware Multiplier
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

24. Multiplication Shortcuts
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

25. Arithmetic Instructions: Division
Similarly, the MSP430 does not have native support for integer division.
Division algorithms for all MSP430 varieties require a software algorithm.
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

26. Arithmetic Instructions: Division
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

27. Arithmetic Instructions: Division
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

28. Arithmetic Instructions: Multiplication and Division
Much better multiplication and division algorithms have been designed for computers.
Horner’s Method: Provides ways to perform calculations using fewer operations (polynomial math).
Booth’s Algorithm: Provides algorithms to work directly with two’s complement integers without conversion to unsigned first.
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

29. Arithmetic Instructions: Other Considerations
When does the carry bit matter? If the native precision of the operation is not big enough, the carry bit
is used to perform multi-precision arithmetic. Discussed later.
Is this addition/subtraction operation signed or unsigned? Doesn’t matter. Addition and subtraction works for both. How the rest of the
program uses the results of the add/subtract operation differs depending on
whether you are dealing with signed or unsigned values (it is all in how you
interpret the binary).
Multiplication and division algorithms, on the other hand, do need to account
for whether the values are signed or unsigned. Architectures with integer
multiplication and division instructions are designed to work with either signed or
unsigned numbers (sometimes an instruction for each).
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

30. Instruction Execution/Timing
Timing - An electronic computer is a synchronous system. - This means that all circuitry is synchronous to a clock (memory, CPU, I/O). - The master clock is derived either from an external crystal oscillator on an on-chip oscillator.
- The on-chip oscillator can be either the VLO (very low-frequency oscillator) or DCO
(digitally-controlled oscillator).
- External crystal oscillators provide accuracy when needed. - The master clock (MCLK) can optionally be divided by 2, 4, or The cycle time (time for each CPU cycle to execute) is 1/(MCLK freq). - Crystal frequencies vary from in the kHz to many MHz and beyond.
Ex) How long does the instruction “mov.w #34,R6” take to execute? - First we calculate the number of read and write cycles.
- The sum of the read and write cycles is the total number of cycles.
- We multiply the total number of cycles by the MCLK period. Execution Time = (# of cycles)(execution time per clock)
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

31. Instruction Execution/Timing
Instruction Execution: mov.w R4, &1234h (Cycles: 4 cycles; Size: 2 words) (Machine Code = 4482h 1234h) Step 1 - READ IC from PC location CPU drives PC value on the address bus.
- 4482h is output from memory onto the data bus, CPU receives 4482h PC is incremented twice (PC = PC + 2). Step 2 - READ operand from PC location CPU drives PC value on the address bus h is output from memory onto the data bus, CPU receives 1234h - PC is incremented twice (PC = PC + 2). Step 3 - READ M(1234h) even though not needed for move h is driven onto the address bus by CPU
- Memory responds with data at memory location 1234h.
Step 4 - WRITE contents of R4 to memory location 1234h h is driven onto the address bus by CPU.
- CPU drives the data bus with contents of R4.
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

32. Code Execution - Example
Add the contents of M(0010h) and M(0011h) and store result in M(0012h): mov.b h, 0012h ; M(0012h)  M(0010h)
add.b h, 0012h ; M(0012h)  M(0011h) + M(0012h)
1) How much memory does this code consume? mov.b h, 0012h ; 3 words add.b h, 0012h ; 3 words words = 12 bytes
2) How long does this code take to execute? mov.b h, 0012h ; 6 cycles add.b h, 0012h ; 6 cycles cycles
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

33. Code Execution – Alternate (Better)
Add the contents of M(0010h) and M(0011h) and store result in M(0012h): mov.b h, R10 ; upper 8 bits of R10 are cleared
add.b h, R ; lower 8 bits used in add, upper 8 stay 0
mov.b R10, 0012h ; writes only the lower 8 bits out to memory
1) How much memory does this code consume? mov.b h, R10 ; 2 words add.b h, R10 ; 2 words mov.b R10, 0012h ; 2 words words = 12 bytes
2) How long does this code take to execute? mov.b h, R10 ; 3 cycles add.b h, R10 ; 3 cycles mov.b R10, 0012h ; 4 cycles cycles
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

34. Code Execution – A Little Can Equal A Lot
Eliminating even a single cycle from within certain areas of code could
make a big difference in performance and, hence, power consumption!
What is the improvement (from previous slides)? Size: (12-10) x 100 ~= 17%
If it executes only once (or very infrequently), 17% is not noticeable.
If, on the other hand, the code were executed thousands of times, the
speed improvement would become very apparent (if executed in a
loop for example)!
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

35. ECE 3430 – Intro to Microcomputer Systems
End of Exam 1 Material
This is the end of the exam 1
material.
Prepare questions for next lecture.
Lecture #7
ECE 3430 – Intro to Microcomputer Systems
Fall 2014