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Pemrogramman VHDL 2 Data Type

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Presentation on theme: "Pemrogramman VHDL 2 Data Type"— Presentation transcript:

1 Pemrogramman VHDL 2 Data Type
Aqwam Rosadi Kardian

2 Pre Defined Data Type

3 BIT, BIT_VECTOR Two Level Logic : ‘0’ or ‘1’

4 BIT, BIT_VECTOR

5 STD_LOGIC & STD_LOGIC_VECTOR

6 STD_LOGIC

7 STD_ULOGIC

8 Other Data Type

9 Example

10 Example – Legal/Ilegal ?

11 User Defined Data Type : Integer

12 User Defined Data Type : Enumerated

13 User Defined Data Type : Enumerated

14 Subtypes

15 Subtypes

16 Arrays

17 Arrays

18 Arrays

19 Arrays

20 Arrays

21 Arrays

22 Arrays

23 Arrays

24 Arrays

25 Port Arrays

26 Port Arrays

27 Port Arrays

28 Port Arrays

29 Records

30 Signed - Unsigned

31 Signed - Unsigned

32 Signed - Unsigned

33 Signed - Unsigned

34 Data Conversions

35 Data Conversions

36 Data Conversions

37 Data Conversions

38 Summary

39 Assignment

40 Terima kasih ! Merci ! Thanks you very much !

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