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Matrix Multiplication Continued

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Presentation on theme: "Matrix Multiplication Continued"— Presentation transcript:

1 Matrix Multiplication Continued
Prachi Bagave Silke Hofstra

2 A new challenge Simple 8 bit microcontroller
Digital signal processing platform General purpose CISC processor

7 General Purpose CISC Processor: Device
Model: Intel Core i5-3570K Clock frequency: 3.40 GHz – 3.80 Ghz Cache: 256 kB L1, 1024 kB L2, 6144 kB L3 Extensions: SSE4.1/4.2, AVX

8 General Purpose CISC Processor: SSE & AVX
Source: Wikimedia. License: CC BY SA 3.0. Copyright: Wikimedia users Bilou and others.

9 General Purpose CISC Processor: Results
Algorithm Threads Time (ms) Instructions ~Cycles I overhead C overhead x86 1 704 8,328,096,442 2,677,706,799 0,0% 4 232 8,328,210,938 2,774,806,277 114,496 3,6% 32 227 8,328,269,295 2,750,197,547 172,853 2,7% SSE4.1 651 2,525,100,261 2,428,963,954 253 2,525,215,451 2,893,945,233 115,190 19,1% 224 2,525,268,996 3,047,492,178 168,735 25,5% Result of 1 million calculations

10 Showdown Algorithm Threads Time (ns) Instructions ~Cycles Arduino 1
3,384,000 - 67,680 DSP 8,640 12,109 8 1,060 x86 704 8,328 2,678 4 253 SSE4.1 651 2,525 2,429 224 Normalised for 1 matrix multiplication

11 Conclusions Significant improvement over an Atmega
Optimisations do work here Reduced instructions != Improved performance For this application: modern GPP best in test


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