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Ultimate Theoretical Models of Nanocomputers
Michael P. Frank MIT Artificial Intelligence Lab
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Goal of this Work Outline a model of computation that can be used as the basis for the design of the most efficient possible computer architectures and algorithms, across a wide range of technologies and scales, from today’s technology all the way down to the nano-scale.
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Who we are Work done as part of the MIT Reversible Computing Project
8/27/2018 Who we are Work done as part of the MIT Reversible Computing Project PI: Thomas F. Knight Jr. With guidance from Norman H. Margolus Other project members: Carlin Vieri, Matt Becker, M. Josephine Ammer, Matt DeBergalis
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Ultimate Models of Computation
8/27/2018 Ultimate Models of Computation Usable as basis for the design of a scalable architecture for a family of physical computer implementations in an achievable technology. Accurately model the scaling behavior of computers as problem sizes increase. Performance on any class of computations scales as well as for any physically possible architecture.
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Benefits of Ultimate Models
8/27/2018 Benefits of Ultimate Models Provides a final standard for algorithm design - best algorithms are really best. Allows algorithm design independently of implementation technology. Performance-scaling predictions remain valid as technology improves and problem sizes get larger
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Physical Constraints Shaping the Ultimate Model
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Limit on Processing Rate in Irreversible Computers
A - min. area of enclosing surface F - max. rate entropy flux per area S - min. entropy generated per op r - total rate of operation per time FA S r = Processing rate scales with surface area, not volume S can never be less than 1 bit, per bit irreversibly erased by an operation F limited by temp. and energy density
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Reversible Logic Devices
Logically reversible Asymptotically physically reversible Entropy per op proportional to speed Entropy per time quadratic in speed Large variety of implementation technologies with this behavior. Entropy coefficient or “badness” b varies widely. S = b t S / t = b / t 2
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Limit of Processing Rate in Reversible Machines
Entropy per operation S = b / t Rate entropy generation R = nS / t Number of devices n = d / V Total rate of operation r = n / t Surface area (square side) A = d Entropy removal rate R = FA d V 3 r A d F = b V 2 2 Beats irreversible r/A = F/S when d > FbV / S
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Spreading things out If algorithm requires no communication:
Spread out processors arbitrarily No speed advantage to reversibility Still, less energy dissipated per op. If alg. requires local communication, delay ~ cycle time, N N N array Irreversible t = (N ), reversible t = O(N ). Reversible advantage only O(N ) 1/3 1/4 1/12
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A Proposed Ultimate Architecture
3-D mesh of reversible PEs, each with: Fixed CPU made of reversible logic devices Fixed-size reversible memory Variable speed of operation Include bounded-flux networks for: Communication Entropy removal (cooling) Power delivery
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Caveats: May not scale as well as analog systems considered as computers (e.g. wind tunnels) Neglects possibility of quantum coherent computation Not yet known to be scalable Model can be extended to include it if needed Ignores effects of gravity At sufficiently large scales, scaling laws change
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Algorithmic Issues At worst, simulate irreversible machine.
Array simulations of 3-D reversible systems No production of computational entropy. Run strictly faster on the reversible mesh. For other applications: benefits unclear Cost of uncomputing information may exceed benefits of 3D Best algs for some problems may be 2D irrev.
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Entropy transport (cooling) technologies
Max entropy flux F, bit sec^-1 cm^-2: 1 mm^2, 1 Gb/s optic fiber: 10^13 Passive emission 100W, 1cm^2, T>300K: 3x10^22 Drexler fractal plumbing, 10 kW/cm^2, T=273K: 3.8x10^24 1 1 m/s: 10^26 1 0.1 c: 10^33
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Entropy generation in irreversible technologies
Entropy per operation S, in bits: 0.5 um 300K: 10^8 Best modern CMOS, 1/2 CV^2 = 10^-14 <900K: 10^6 Likharev’s superconducting logic, 10^ x10^4 Lowest possible: 1 bit, per bit irreversibly lost
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Entropy coefficients of reversible technologies
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Scales above which reversible computing is a win
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MIT Reversible Computing Project - What We’re Doing
Design & fab a complete reversible RISC-style processor. Reversible memory. Resonant energy-recovery power supplies. Reversible high-level language & compiler Reversible algorithms and applications
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What’s Next Prototype reversible mesh computer
for fast physical simulations Develop efficient algorithms for a variety of problems Need a high-level programming model for physical algorithms Reversible manufacturing?
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