1. ADSL Time-Domain Equalizer
Test & Evaluation Report By
David Love
Supervising Professor: Dr. Brian Evans
TA: Alex Henneguelle

2. Description of Project
An Asymmetric Digital Subscriber Line (ADSL) modem provides high speed Internet access to the home
Data travels over a traditional telephone line
Delay from line must be shortened
Time-Domain Equalizer solves this problem

3. Example of Delay

4. Specifications
Must run on a Texas Instruments C6x digital signal processor (DSP)
Must match algorithm designed by Arslan, Evans, and Kiaei
Must run in a reasonable amount of time
Must provide adequate performance

5. Test and Evaluation Plan
Two Main Measures
Percentage Error
SNR Degradation in time-domain equalizer demo developed by Güner Arslan, Biao Lu, and Dr. Brian Evans

6. Block Layout hest Calculate Signal Power Matrices (A and B)
Cholesky Decomposition (A = GTG) A G B
Matrix Inversion
A-1B
Power Method w

7. Choice of Delay

8. SNR Degradation Signal-to- Noise Ratio (SNR) Channel Model 1
Delay = 42
Channel Model 2
Delay = 40
Channel Model 3
Delay = 46
Channel Model 8
Delay = 56
Theoretical
45 dB
45.7 dB
45.1 dB
44.9 dB
Computed
44.8 dB
Degradation
0 dB
0.1 dB

9. Evaluation of Results Met Specifications
Matches fairly closely with theoretical performance
Runs in cycles for 10 taps (2.72 ms on 300 MHz DSP) or cycles for 8 taps (2.03 ms on 300 MHz DSP)
Used variant of Arslan, Evans, and Kiaei Algorithm that assumes unity frequency weights

10. Prospects for Future
Appears to be implementable in a fixed-point system
Can improve performance by correcting resolution problems of Cholesky block and Matrix Inversion block
Implement frequency weights

11. Conclusion Implemented algorithm on a TI C6x DSP
Closely matches theoretical performance but with increased delay
Shows promise of running in limited time dictated by ADSL standard
Could be improved in future to provide a higher bitrate