1. DIGITAL ELECTRONICS WITH MULTISIM
CHAPTER 2:
DIGITAL ELECTRONICS WITH MULTISIM

2. MultiSim: Arithmetic Circuits, Flip-flops, Counters, Shift Registers and Multiplexers

3. Arithmetic Circuits
Arithmetic circuit perform mathematical functions such as subtraction, multiplication, and division.
Eg: adder circuits
Examples of adder ICs are:
7438N 4-bit binary adder
4008BT 4-bit full adder
Samjy/DENC 2533

4. Adder Half adder: Full Adder:
The half adder accepts two binary digits on its inputs and produces two binary digits on its outputs, a sum bit and a carry bit.
Full Adder:
The full adder accepts two binary digits on its inputs and input carry and generates a sum output and output carry.
Samjy/DENC 2533

5. HALF ADDER 1. LOGIC CIRCUIT 2. BOOLEON EXPRESSION A B COUT=AB (AND)
Sum, Σ = AB’ + A’B
= AB (XOR)
3. LOGIC DIAGRAM A B
COUT Σ 1
4. TRUTH TABLE
Samjy/DENC 2533

6. FULL ADDER 1. LOGIC CIRCUIT A 2. BOOLEON EXPRESSION B Cin
Sum, Σ=(AB)CIN
COUT=AB+(AB)CIN
2. BOOLEON EXPRESSION A B
CIN
COUT Σ 1
3. LOGIC DIAGRAM
4. TRUTH TABLE
Samjy/DENC 2533

7. Adder Circuits using 4008BT Full Adder IC
A3A2A1A0 + B3B2B1B0
Samjy/DENC 2533

8. Full Adder Circuit (2)
A+B+Cin
Samjy/DENC 2533

9. Binary Subtractor
Subtractor circuits take two binary numbers as input and subtract one binary number input with other binary number input.
There are 4 basic rules for subtracting bits;
0 – 0 = 0
1 – 1 = 0
1 – 0 = 1
1 0 – 1 = – 1 with a borrow of 1
Samjy/DENC 2533

10. EXAMPLE 2 :- Subtract 100002 – 111012 SOLUTION :- 1 0 0 0 0 10000
(1’C)
10010
The answer is negative. The true magnitude is the 1’s complement of or The answer is
*Check.
= -1310
No overflow
Samjy/DENC 2533

11. 1st Complement Subtractor Circuits
4 – 9 = -5
Samjy/DENC 2533

12. Sequential Circuit: Flip-Flops(ffs)
Is a logic circuit with a memory characteristics such that its output (Q) will go to a new stage in response to an input pulse, and will remain that new state after the input pulse is terminated.
Is a sequential circuit, whose output changes when its CLOCK input triggers.
Several types of edge-triggered ffs, such as D, JK, SC ff.
Synchronous control input – ffs is synchronous with PGT/NGT (positive/negative edge triggered) signal applied to CLOCK.
Asynchronous control input-set the ffs to ‘1’state or ‘0’ state by its 2 asynchronous inputs: PRESET and CLEAR.
Samjy/DENC 2533

13. Constructed of JK Flip-Flop Circuit using 74LS112N IC
Samjy/DENC 2533

14. Sequential Circuit: Counters
Flip-flops and logic gates could be connected to function as counters and registers.
Counters and related circuits may be used to count items, to time functions, to synchronize various events, to divide, and to control results based upon the outcome of a counting function.
The different types of counters are usually specified by their activity and the type of output they provide.
Counters can be categorized as Up or Down counters.
Samjy/DENC 2533

15. Asynchronous and Synchronous Counters
A synchronous counter circuit has the operation of flip-flops is synchronized by a common clock pulse so that when several flip flops must change state, the state changes occur simultaneously.
Asynchronous counters (Ripple counter) which the state change of one flip flop triggers the next flip flop in line. It uses the external event to directly SET or CLEAR a flip-flop when it occurs. Each flip-flop in the ripple counter is clocked by the output from the previous flip-flop. Only the first flip-flop is clocked by an external clock.
Samjy/DENC 2533

16. Implementation with Different FF Types
T flip-flops is well suited for straightforward binary counters -but yielded worst gate and literal count
R-S flip-flops don't really exist.
J-K flip-flops yielded lowest gate count -tend to yield best choice for reducing gate count in packaged logic
D flip-flops yield simplest design procedure -best choice where area/literal count is the key.
Flip-flops excitation table
Samjy/DENC 2533

17. TYPES OF SYNCHRONOUS COUNTER
Up counter.
- Counter that counts upward from 0
to a maximum count.
Down counter.
- Counter that counts from a maximum
count downward to 0.
Up / Down counter.
- Counter that can count up or down
depending on how its input are activated.
Samjy/DENC 2533

18. SYNCHRONOUS (Up Counter)
Samjy/DENC 2533

19. TRUTH TABLE Present state Next state Flip-flop input Q1 Q2 Q3 J1 K1 J21 X
Samjy/DENC 2533

20. SCHEMATIC DIAGRAM
Samjy/DENC 2533

21. SYNCHRONOUS (Down Counter)
Samjy/DENC 2533

22. TRUTH TABLE Present state Next state Flip-flop input Q1 Q2 Q3 J1 K1 J21 X
Samjy/DENC 2533

23. SCHEMATIC DIAGRAM
Samjy/DENC 2533

24. Asynchronous (Ripple Counter)
Samjy/DENC 2533

25. 74LS293: 4-STAGE IC ASYNCRONOUS COUNTER
Example of circuit using IC for 4-stage asynchronous counter.
This circuit uses the 74LS293 as a MOD-14 Counter.
Samjy/DENC 2533

26. The Synchronous Counter
3-stage synchronous counter
A synchronous counter is a counter whose ffs are clocked simultaneously by a common clock source.
The synchronization of the clocking event causes the transitions of all of the ffs states to occur simultaneously.
IC: 74LS393N synchronous counter
Samjy/DENC 2533

27. Sequential Circuit: Shift Registers
Shift registers circuits are synchronous digital circuits used to store or move binary data.
These types of circuits consist either of a series of FFs in groups which can store one bit of data each or as shift register ICs that store larger groups of data.
The amount of data that can be stored in a shift register depends on the width of the register and the number of storage FFs contained in the register.
Basic method of shift registers:
Serial in/serial out shift register
Serial in/ parallel out
Parallel in/serial out
Parallel in/parallel out
Samjy/DENC 2533

28. Serial In/Serial Out Shift Registers
Samjy/DENC 2533

29. Serial In/Parallel Out Shift Registers
Samjy/DENC 2533

30. Multiplexer

31. Multiplexer digital atau pemilih data adalah litar logik yang menerima beberapa data masukan digital dan memilih satu daripadanya pada bila-bila masa untuk dihantar ke keluaran.
Kitaran data masukan yang diperlukan oleh keluaran adalah dikawal oleh masukan SELECT (biasanya dikenali sebagai alamat masukan).
Samjy/DENC 2533

32. 2-MASUKAN MULTIPLEXER
Mempunyai data masukan I0 dan I1 dan masukan SELECT “S”.
Z = I0 S’ + I1S S
OUTPUT I1 1 I0
Samjy/DENC 2533

33. 4-MASUKAN MULTIPLEXER S
OUTPUT I0 1 I1 I2 I3
Samjy/DENC 2533

34. 4-to-1 Mux Using 2-to-1 Mux in Multisim
Samjy/DENC 2533

35. Enable akan menghasilkan samada keluaran normal atau sebaliknya.
Jika enable (E’)=0, maka S2,S1 dan S0 akan memilih salah satu daripada data masukan dari I0 hingga I7.
Jika enable (E’)=1 multiplexer tidak akan berfungsi yang mana Z=0 dan mengabaikan masukan SELECT.
Samjy/DENC 2533

36. What is Demultiplexer ? Demultiplexer is known as data distributors.
It performs the reverse operation of multiplexer.
It takes input and distributes it over several outputs.
Samjy/DENC 2533

37. Demultiplexer
LOGIC DIAGRAM
Data
Input
SELECT Input O0 O1
ON-1
DEMUX
DATA input transmitted to only one of the outputs as determined by select input code.
Samjy/DENC 2533

38. A one-to-two-line demultiplexer is shown below
Clock
Output
Switch S
Samjy/DENC 2533

39. 1-to-4 line Demultiplexer
Data input
Select Lines
Data output lines
Samjy/DENC 2533

40. 1-to-16 Demux using 74HC154NT: in Multisim
Samjy/DENC 2533