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CSE351: Memory, Data, & Addressing I CSE 351 Spring 2017
Instructor: Ruth Anderson Teaching Assistants: Dylan Johnson Kevin Bi Linxing Preston Jiang Cody Ohlsen Yufang Sun Joshua Curtis
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To-Do List Start-of-Course survey [Catalyst] due Thursday (3/30)
Section 1 is this Thursday Install the virtual machine (VM) before coming to section Bring your computer with you to section Lab 0, due Monday 11:59pm Homework 1, due Monday 11:59pm Readings in CSAPP
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Lab 0, Homework 1, and Readings
Lab 0, due Monday 11:59pm Basic exercises to start getting familiar with C – need the VM Credit/no-credit Do ASAP, attending Section 1 will help Homework 1, due Monday 11:59pm 3 canvas quizzes, 20 tries each, you best overall score is kept Course policies – you can do this one now! Unsigned Number Representations – will discuss on Wed Number Bases - will discuss on Wed Readings: For Mon: CSPP: § (pp. 1-28) For Wed: CSPP: § (pp ) For Fri: CSPP: § (pp )
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Roadmap C: Java: Assembly language: OS: Machine code: Computer system:
Memory & data Integers & floats x86 assembly Procedures & stacks Executables Arrays & structs Memory & caches Processes Virtual memory Memory allocation Java vs. C C: Java: car *c = malloc(sizeof(car)); c->miles = 100; c->gals = 17; float mpg = get_mpg(c); free(c); Car c = new Car(); c.setMiles(100); c.setGals(17); mpg = c.getMPG(); Assembly language: get_mpg: pushq %rbp movq %rsp, %rbp ... popq %rbp ret OS: Machine code: Computer system:
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Hardware: Logical View
Memory CPU Bus CPU: all computations done here Memory: big array of bytes Big pipe between CPU and memory, in order to keep CPU fed Bus: connect everything else to each other Bus just means you broadcast on it (to everyone) Same root as the other kind of “bus” Disks bigger storage, slower, farther away, persistent Network, etc. Disks USB Etc. Net
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Hardware: Physical View
USB… Bus connections CPU (empty slot) CPU Looks funny because of heat sink I/O controller Memory Storage connections
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Hardware: 351 View (version 0)
Memory instructions ? CPU data CPU executes instructions; memory stores data To execute an instruction, the CPU must: fetch an instruction; fetch the data used by the instruction; and, finally, execute the instruction on the data… which may result in writing data back to memory The CPU and Memory are what this course focuses on.
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Hardware: 351 View (version 1)
Memory instructions i-cache take 470… this week… CPU data registers The CPU holds instructions temporarily in the instruction cache The CPU holds data temporarily in a fixed number of registers Instruction and operand fetching is hardware-controlled Data movement is programmer-controlled (in assembly) We’ll learn about the instructions the CPU executes – take CSE/EE470 to find out how it actually executes them
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Hardware: 351 View (version 1)
Memory instructions i-cache take 470… this week… How are data and instructions represented? CPU data registers The CPU holds instructions temporarily in the instruction cache The CPU holds data temporarily in a fixed number of registers Instruction and operand fetching is hardware-controlled Data movement is programmer-controlled (in assembly) We’ll learn about the instructions the CPU executes – take CSE/EE470 to find out how it actually executes them How does a program find its data in memory? We’re going to start to answer these two questions today
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Memory, Data, and Addressing
Representing information as bits and bytes Organizing and addressing data in memory Manipulating data in memory using C
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Question 1: Memory CPU instructions data i-cache
take 470… this week… How are data and instructions represented? CPU data registers Okay so first…
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Binary Representations
Base 2 number representation A base 2 digit (0 or 1) is called a bit Represent as or Electronic implementation Easy to store with bi-stable elements Reliably transmitted on noisy and inaccurate wires Leading zeros 0.0V 0.5V 2.8V 3.3V 1 Leading zeros… Speed of transition from low to high and back limits the speed over our computers. Stay away from middle voltages. How fast we can get there is determined by… physics!
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Review: Number Bases Key terminology: digit (d) and base (B)
In base B, each digit is one of B possible symbols Value of 𝑖-th digit is 𝑑× 𝐵 𝑖 where 𝑖 starts at 0 and increases from right to left n digit number dn-1dn d1d0 value = dn-1Bn-1 + dn-2Bn d1B1 + d0B0 In a fixed-width representation, left-most digit is called the most-significant and the right-most digit is called the least-significant Notation: Base is indicated using either a prefix or a subscript 13
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Describing Byte Values
0000 1 0001 2 0010 3 0011 4 0100 5 0101 6 0110 7 0111 8 1000 9 1001 A 10 1010 B 11 1011 C 12 1100 D 13 1101 E 14 1110 F 15 1111 Hex Decimal Binary Binary ( – ) Byte = 8 bits (binary digits) Decimal (010 – ) Hexadecimal (0016 – FF16) Byte = 2 hexadecimal (or “hex” or base 16) digits Base 16 number representation Use characters ‘0’ to ‘9’ and ‘A’ to ‘F’ Write FA1D37B16 in the C language as 0xFA1D37B or 0xfa1d37b More on specific data types later… LSB MSB 1 0*27 0*26 1*25 0*24 1*23 1*22 0*21 1*20 32 8 4 = 4510 How familiar are you all with binary? Upper/lower case is fine
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Question 2: Memory CPU instructions data i-cache registers
take 470… this week… CPU data registers How does a program find its data in memory?
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Byte-Oriented Memory Organization
00•••0 FF•••F • • • Conceptually, memory is a single, large array of bytes, each with a unique address (index) The value of each byte in memory can be read and written Programs refer to bytes in memory by their addresses Domain of possible addresses = address space But not all values (e.g., 351) fit in a single byte… Store addresses to “remember” where other data is in memory How much memory can we address with 1-byte (8-bit) addresses? Many operations actually use multi-byte values Each byte can be read and written Address space determined by how many bits in the address So what if things don’t fit in a single byte? How many things does 1 byte allow us to address?
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Machine Words Word size = address size = register size
Word size bounds the size of the address space and memory word size = 𝑤 bits → 2𝑤 addresses Current x86 systems use 64-bit (8-byte) words Potential address space: 𝟐𝟔𝟒 addresses 264 bytes 1.8 x 1019 bytes = 18 billion billion bytes = 18 EB (exabytes) = 16 EiB (exbibytes) Actual physical address space: 48 bits Instead, we typically talk about addresses in terms of “words” Use same word size anywhere that you typically store addresses You could count the world population with 33 fingers (using population number of billion) [x86-64 currently supports up to 48-bit physical addresses: 256 TB (terabytes)] How big is an exabyte?
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Aside: Units and Prefixes
Here focusing on large numbers (exponents > 0) Note that 103 ≈ 210 SI prefixes are ambiguous if base 10 or 2 IEC prefixes are unambiguously base 2 Disk capacity SI to IEC conversion
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Word-Oriented Memory Organization
64-bit Words 32-bit Words Addr. (hex) Bytes Addresses specify locations of bytes in memory Address of word = address of first byte in word Addresses of successive words differ by word size (in bytes): e.g., 4 (32-bit) or 8 (64-bit) Address of word 0, 1, … 10? 0x00 Addr = ?? 0x01 0x02 Addr = ?? 0x03 0x04 Addr = ?? 0x05 0x06 0x07 0x08 Addr = ?? 0x09 What do we use to address bigger chunks of bytes? 0x0A Addr = ?? 0x0B 0x0C Addr = ?? 0x0D 0x0E 0x0F
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Word-Oriented Memory Organization
64-bit Words 32-bit Words Addr. (hex) Bytes Addresses still specify locations of bytes in memory Address of word = address of first byte in word Addresses of successive words differ by word size (in bytes): e.g., 4 (32-bit) or 8 (64-bit) Address of word 0, 1, … 10? Alignment 0x00 Addr = ?? 0x01 0x02 0000 0004 0008 0012 Addr = ?? 0x03 0x04 0000 0008 Addr = ?? 0x05 0x06 0x07 0x08 Addr = ?? 0x09 Use the first byte of the word Still count by bytes This means there will by a bunch of addresses we should never see Valid addresses are correctly aligned Aside: isn’t this wasteful? Yes, but remember how much we can address with 64 bits? Probably don’t need to worry too much. 0x0A Addr = ?? 0x0B 0x0C Addr = ?? 0x0D 0x0E 0x0F
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A Picture of Memory (64-bit view)
A “64-bit (8-byte) word-aligned” view of memory: In this type of picture, each row is composed of 8 bytes Each cell is a byte A 64-bit pointer will fit on one row one word 0x04 0x05 0x06 0x07 0x00 0x01 0x02 0x03 Address 0x00 0x 0x 0x In this course, we’ll be doing everything in 64-bits What’s the second row’s address going to be? 0x08 Third? 0x10 0x 0x 0x 0x 0x 0x
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A Picture of Memory (64-bit view)
A “64-bit (8-byte) word-aligned” view of memory: In this type of picture, each row is composed of 8 bytes Each cell is a byte A 64-bit pointer will fit on one row one word 0x04 0x05 0x06 0x07 0x00 0x01 0x02 0x03 Address 0x00 0x08 0x10 0x18 0x20 0x28 0x30 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x38 0x40 0x48
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Addresses and Pointers
64-bit example (pointers are 64-bits wide) An address is a location in memory A pointer is a data object that holds an address Address can point to any data Value 351 stored at address 0x08 35110 = 15F16 = 0x F Pointer stored at 0x38 points to address 0x08 Address 0x00 0x08 0x10 0x18 0x20 0x28 0x30 0x38 0x40 0x48 00 01 5F Note that everything is just padded with extra 0s 00 08
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Addresses and Pointers
64-bit example (pointers are 64-bits wide) An address is a location in memory A pointer is a data object that holds an address Address can point to any data Pointer stored at 0x48 points to address 0x38 Pointer to a pointer! Is the data stored at 0x08 a pointer? Could be, depending on how you use it Address 0x00 0x08 0x10 0x18 0x20 0x28 0x30 0x38 0x40 0x48 00 01 5F Note that everything is just padded with extra 0s 00 08 00 38
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address size = word size
Data Representations Sizes of data types (in bytes) Java Data Type C Data Type 32-bit (old) x86-64 boolean bool 1 byte char 2 short short int int 4 float long int 8 double long long double 16 (reference) pointer * This mapping is mostly an arbitrary historical artifact except for address sizes. (reference) pointer * 4 8 address size = word size To use “bool” in C, you must #include <stdbool.h>
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More on Memory Alignment in x86-64
For good memory system performance, Intel recommends data be aligned However the x86-64 hardware will work correctly regardless of alignment of data Design choice: x86-64 instructions are variable bytes long Aligned: Primitive object of 𝐾 bytes must have an address that is a multiple of 𝐾 More about alignment later in the course 𝐾 Type 1 char 2 short 4 int, float 8 long, double, pointers
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Byte Ordering How should bytes within a word be ordered in memory?
Example: store the 4-byte (32-bit) int: 0x a1 b2 c3 d4 By convention, ordering of bytes called endianness The two options are big-endian and little-endian Based on Gulliver’s Travels: tribes cut eggs on different sides (big, little)
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Byte Ordering Big-endian (SPARC, z/Architecture)
Least significant byte has highest address Little-endian (x86, x86-64) Least significant byte has lowest address Bi-endian (ARM, PowerPC) Endianness can be specified as big or little Example: 4-byte data 0xa1b2c3d4 at address 0x100 Big Endian Most significant is first Little Endian Looks backwards Let’s look at some more examples… 0x100 0x101 0x102 0x103 01 23 45 67 Big Endian a1 b2 c3 d4 0x100 0x101 0x102 0x103 67 45 23 01 Little Endian d4 c3 b2 a1
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Byte Ordering Examples
Decimal: 12345 Binary: Hex: Byte Ordering Examples IA32, x86-64 (little endian) SPARC (big endian) int x = 12345; // or x = 0x3039; 0x00 39 30 00 30 39 00 0x00 0x01 0x01 0x02 0x02 0x03 0x03 30 39 00 32-bit SPARC 30 39 00 64-bit SPARC long int y = 12345; // or y = 0x3039; (A long int is the size of a word) 39 30 00 IA32 39 30 00 x86-64 0x00 0x01 0x02 0x03 0x00 0x01 0x02 0x03 0x00 0x01 0x02 0x03 00 0x00 0x01 0x02 0x03 00 0x04 0x05 0x06 0x07 0x04 0x05 0x06 0x07
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Endianness Often programmer can ignore endianness because it is handled for you Bytes wired into correct place when reading or storing from memory (hardware) Compiler and assembler generate correct behavior (software) Endianness still shows up: Logical issues: accessing different amount of data than how you stored it (e.g. store int, access byte as a char) When running down memory errors, need to know exact values Manual translation to and from machine code (in 351)
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Reading Byte-Reversed Listings
32-bit example Disassembly Take binary machine code and generate an assembly code version Does the reverse of the assembler Example instruction in memory add value 0x12ab to register ‘ebx’ (a special location in the CPU) Address Instruction Code Assembly Rendition : 81 c3 ab add $0x12ab,%ebx 1-to-1 mapping between binary instructions and assembly instructions Disassembler reverses the process of the assembler You’ll see this in Lab 2, comes up when debugging binaries using GDB $0x12ab represents a literal value (4779) Next slide Deciphering numbers
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Reading Byte-Reversed Listings
32-bit example Disassembly Take binary machine code and generate an assembly code version Does the reverse of the assembler Example instruction in memory add value 0x12ab to register ‘ebx’ (a special location in the CPU) Address Instruction Code Assembly Rendition : 81 c3 ab add $0x12ab,%ebx Note how the literal value Deciphering numbers Value: 0x12ab Pad to 32 bits: 0x000012ab Split into bytes: ab Reverse (little-endian): ab
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Question: We store the value 0x as a long int (size of long int = size of pointer) at address 0x100 and then get back 0x00 when we read a byte at address 0x102 What machine setup are we using? 32-bit, big-endian (A) 32-bit, little-endian (B) 64-bit, big-endian (C) 64-bit, little-endian (D)
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Summary Memory is a long, byte-addressed array
Word size bounds the size of the address space and memory Different data types use different number of bytes Address of chunk of memory given by address of lowest byte in chunk Object of 𝐾 bytes is aligned if it has an address that is a multiple of 𝐾 IEC prefixes refer to powers of 2 10 Pointers are data objects that holds addresses Endianness determines storage order for multi-byte objects
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