1. HCAL DAQ (hardware) Debugging Status
Eric Hazen
Boston University
May 13, 2008
E. Hazen -- CrUZeT DAQ

2. DAQ Status Cruzet overview: DAQ ran pretty smoothly
DCC programmed not to assert busy because of LOS or HTR errors. Most data was OK.
Current Issues:
Several problems which corrupt 1-2 HTR payloads at a very low probability (very roughly 1/100k evt)
In CRUZET this cause loss-of-sync on that spigot for the rest of the run.
New DCC firmware exists which mitigates this by recovering synchronization – tested at BU only so far
The plan is to eliminate or minimize the problems at their source, and let the new DCC firmware sweep up the rest
May 13, 2008
E. Hazen -- CrUZeT DAQ

3. Low rate problems “Burst Noise” problem. Confined to 4 half- HTRs.
Seen in GRUMM... 4 offending HTRs removed to 904
This problem does happen in still not understood in detail but confined to 4 HTRs and possibly one in USC
Other species of bugs identified
“Blabbering HTR” problem (HTR sends repeated nonsense)
Wu thinks this is a DCC PCI bus timing problem
“Broken Event” problem (event broken in two pieces)
Wu thinks this is an LRB memory problem
“Random EvN” problem (EvN is crazy, no loss of sync)
This one is probably also an LRB/DCC problem
So, the spotlight is on the DCC at the moment
May 13, 2008
E. Hazen -- CrUZeT DAQ

4. High rate problems Current focus is on 10kHz..100kHz runs in 904
Various problems seen... consistent with experience during a brief pre-Cruzet HR test
HTRs send events with BZ and OW flags set for no apparent reason
DCC sees extra blocks from some HTRs
DCC event building stops for no obvious reason
May 13, 2008
E. Hazen -- CrUZeT DAQ

5. High Rate Problems II
Can run at 50kHz “forever” at BU... no LoS errors. So, there is somehow a problem when using the real hardware (LTC, TTCci, etc).
BU setup is missing...
LTC, TTCci
904 setup is missing key features for testing
No S-Link readout; no TTS system; no backpressure
Anticipate ready to do mini-DAQ tests in about a week... stay tuned.
May 13, 2008
E. Hazen -- CrUZeT DAQ

6. Firmware Development HTR zero-suppression DCC re-synchronization logic
First version done, under test
Many additional diagnostic counters added
CRC on HTR payloads
DCC end done.. HTR end underway
May 13, 2008
E. Hazen -- CrUZeT DAQ

7. Current Team Effort Wu, Hazen working at BU
Wu is active in with everyone
Drew, Terry and UMD
Terry is running 904 tests almost continuously
Tullio, Dick, Ted (Laird) at CERN
With support from Jeremy, Arno, and others as needed
May 13, 2008
E. Hazen -- CrUZeT DAQ

8. Other problems from CRUZET
“TTC Storm” where entire partitions lose sync
Failure to start runs – FEDs go busy
Many HTRs fail to send any data – init problem?
Will need to work on these in the pit, I think
HTR zero-suppression bugs
Tried to fix in 0x62 firmware – made things worse
Will get back to this as soon as we get some of the other issues under control
May 13, 2008
E. Hazen -- CrUZeT DAQ