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Jehan-François Pâris jfparis@sbcglobal.net FIRST MIDTERM ANSWERS Jehan-François Pâris jfparis@sbcglobal.net.

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Presentation on theme: "Jehan-François Pâris jfparis@sbcglobal.net FIRST MIDTERM ANSWERS Jehan-François Pâris jfparis@sbcglobal.net."— Presentation transcript:

1 Jehan-François Pâris jfparis@sbcglobal.net
FIRST MIDTERM ANSWERS Jehan-François Pâris

2 A Problem with the first problem set
Problem 5 states Simplify the expression (ABC)’ (A + DE) (A + B’C) (B + E) and convert it into a form that can be represented using a programmable logic array. This means transforming the expression into sum of products

3 A Problem with the first problem set
Neglecting null products, we have (ABC)’ (A + DE) (A + B’C) (B + E) = (A’ + B’ + C’) (A+ DE) (A +B’C) (B + E) = A’B’CDE +  A’B’CDE + AB’E + AB’CE + AB’DE + ABC’ + AC’E + AB’C’DE  + AC’E  = B’CDE + AB’E +  ABC’ + AC’E This is fine but we can eliminate one of the three products

4 A Problem with the first problem set
Let us rewrite AC’E = ABC’E + AB’C’E We would them have B’CDE + AB’E + ABC’ + ABC’E + AB’C’E = B’CDE + AB’E(1 + C’) + ABC’(1 + E) = B’CDE + AB’E + ABC’ Solution obtained using Karnaugh maps Those you have it will have 20/20.

5 First Question Simplify the following Boolean expression. (10 points)
w (v x y + y) +w' y + v w x + y

6 Answer w (v x y + y) + w' y + v w x + y = v w x y + w y + w’ y + v w x + y = v w x + y

7 Second Question Give a simplified implementation for the following expression using only NAND gates. (20 points) w' (x  y) + w x y' + x' y'

8 Answer w' (x  y) + w x y' + x' y' = w' (x y' + x' y) + w x y' + x' y' = w' x y’ + w' x’ y + w x y' + x' y'= x y' + w' x' y + x' y' = w' x' y + y'

9 Answer (w'x'y)' w' x' y ((w'x'y)'.y)' = w'x'y + y'

10 Third Question Consider a huge program that consists of a purely sequential part that takes two hours and another part that takes eight hours. What is the maximum speedup we can achieve by parallelizing the second part of the program? (5 points)

11 Amdahl’s Law The total speedup for the whole system will be
The maximum possible speedup when Ti  0

12 Answer The maximum speedup we can achieve is a factor of (8 + 2)/2 = 5 .

13 Fourth Question Server motherboard A has a SPEC CPU2006 rating of 31.4 while server B has a rating of Which one of the two motherboards is faster? (5 points)

14 Answer Motherboard _ A _ is faster than the other motherboard.

15 Fifth Question (I) Assume we have a very basic microprocessor doing 4-bit arithmetic. (3×5 points) How would you represent the decimal value – 8 in signed arithmetic?

16 Answer – 8 is represented in 4-bit arithmetic by 1000

17 Fifth Question (II) What would be its result of adding 0100 to 0101 assuming that The numbers being added were unsigned integers? The numbers being added were signed integers?

18 Answer = 1001 If the numbers being added are unsigned integers, the answer is +9 If the numbers being added are signed integers, the answer is INVALID due to an overflow condition

19 Sixth Question Implement a two-bit counter going to the cycle 00, 01, 10, 11, 00, … when its input is on. You may use the flipflops and the gates of your choice. (15 points)

20 Answer State transition diagram 00 01 11 10

21 Answer Four states means two flipflops One for lesser significant bit:
Triggered by each transition One for more significant bit: Triggered by transition occurring when LSB = 1 Use T flipflops

22 Answer Q’ T X Q Clock T Q’ Q Y Clock From chapter II notes

23 Seventh Question Given the following MIPS instructions,
lw r1, a(r2) addi r1, r2, #n addiu r1, r2, #n andi r1, r2, #n ori r1, r2, #n Clear the contents of register r1? (5 points) Copy the contents of register r2 into register r1? (5 points)

24 Answer Clear the contents of register r1? (5 points) ori r1, $0, 0
andi r1, $0, 0 addi r1, $0, 0 (slower?) Copy the contents of register r2 into register r1? (5 points) ori r1, r2, 0 addi r1, r2, 0 (slower?) addr 1, r2, $0

25 Eighth Question Unlike the IBM/360 instruction set, the MIPS instruction set has fixed-size instructions. What is the main advantage of having fixed-size instructions? (5 points) Which group of MIPS instructions takes advantage of this property and how? (5 points)

26 Answer What is the main advantage of having fixed-size instructions? (5 points) Can predict the exact location of an instruction before decoding the instructions that precede Allows prefetching and pipelining

27 Answer Which group of MIPS instructions takes advantage of this property and how? (5 points) I-format jump instructions multiply their offset by 4 because all instructions are 4-byte wide

28 Ninth Question Explain why the very large instruction set of the x86 family of processors is at the same time a nightmare and a blessing for both Intel and AMD. (2×5 points)

29 Answer A nightmare to implement
A blessing because it discourages the competition


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