1. Sharif University of Technology Department of Computer Engineering
Altera CPLDs
Alireza Ejlali

2. Array of LABs (Logic Array Blocks)
MAX 5000 Series
EPROM Technology
Array of LABs (Logic Array Blocks)
Programmable Interconnect Array (PIA)
Capaciry = 300 ~ 4000 gates
Pin-to-pin delay  20 ns

3. MAX 5000 Series

4. MAX 5000 Logic Array Block (LAB)
LAB contains 16~32 macrocells
MAX 5000 Macrocell:
an AND-Plane
3 PTs
a 3-input OR-gate
a flip-flip
configurable as D type, JK, T, RS, or can be transparent.

5. MAX 5000 Macrocell

6. MAX 5000 Product Term Expander

7. MAX 7000 Series Available both based in EPROM and E2PROM
Capaciry = 500 ~ 5000 gates
Main components:
Logic Array Block (LAB)
Programmable Interconnect Array (PIA)
capable of connecting any LAB input or output to any other LAB.
the inputs and outputs of the chip connect directly to the PIA
I/O blocks

8. Altera MAX 7000 Series

9. MAX 7000 Logic Array Block (LAB)

10. MAX 7000 Macrocell A macrocell comprises: an AND-Plane an OR-gate
5 PTs
can have up to 15 extra PTs from macrocells in the same LAB
an OR-gate
a flip-flip
can be configured as D type, JK, T, RS, or can be transparent.

11. MAX 7000 Macrocell

12. MAX 9000
Capacity=
6000~12000
In circuit programmable (JTAG)