1. Copyright 2009 - Joanne DeGroat, ECE, OSU
Counters
9/15/09 - L27 Counters
Copyright Joanne DeGroat, ECE, OSU

2. Copyright 2009 - Joanne DeGroat, ECE, OSU
Class 27 – Counters
A counter we have seen
A ripple counter
Other counters
Material from section 7-6 of text
9/15/09 - L27 Counters
Copyright Joanne DeGroat, ECE, OSU

3. Copyright 2009 - Joanne DeGroat, ECE, OSU
Ripple Counter
“A register that goes through a prescribed sequence of distinct states upon the application of a sequence of input pulses is called a counter.”
The input pulses could be the clock or some other input that occurs when the next step in the count should occur.
A counter that follows the binary number sequence is called a binary counter.
9/15/09 - L27 Counters
Copyright Joanne DeGroat, ECE, OSU

4. Copyright 2009 - Joanne DeGroat, ECE, OSU
A ripple counter
Made out of T type FFs
Using D FFs 
Here the D FFs are configured to be T FFs
9/15/09 - L27 Counters
Copyright Joanne DeGroat, ECE, OSU

5. Copyright 2009 - Joanne DeGroat, ECE, OSU
Synchronous counters
Desire to move through the sequence of binary numbers, either counting up or down, such that all the outputs achieve their new value at about the same time on either the rising or falling edge of the clock signal.
9/15/09 - L27 Counters
Copyright Joanne DeGroat, ECE, OSU

6. up binary counter with ENable
Synchronous Up counter with count enable
Symbol Serial gating Parallel gating
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Copyright Joanne DeGroat, ECE, OSU

7. Binary counter with || load
Now add parallel load capability
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Copyright Joanne DeGroat, ECE, OSU

8. Copyright 2009 - Joanne DeGroat, ECE, OSU
Up/Down counters
To count up the input to the next state is obtained by adding 1 to the current state.
The count down the input to the next state is obtained by subtracting 1 from the current state.
An up/down counter with enable has the following feedback equations:
9/15/09 - L27 Counters
Copyright Joanne DeGroat, ECE, OSU

9. Copyright 2009 - Joanne DeGroat, ECE, OSU
BCD counter
Not how it goes back to 0 after 9 (1001) is reached. (Note this is only an up counter)
9/15/09 - L27 Counters
Copyright Joanne DeGroat, ECE, OSU

10. Arbitrary count sequences
A counter can be designed to count in any sequence. Use general state machine design methodology.
9/15/09 - L27 Counters
Copyright Joanne DeGroat, ECE, OSU

11. Copyright 2009 - Joanne DeGroat, ECE, OSU
One last topic
ONE HOT – what summer days sometimes are
But in state machines it is a design style where 1 F/F is used for each state. A ‘1’ will progress from FF to FF with all others being ‘0’.
9/15/09 - L27 Counters
Copyright Joanne DeGroat, ECE, OSU

12. Copyright 2009 - Joanne DeGroat, ECE, OSU
Class 27 assignment
Covered counters from section 7-6
Problems for hand in
Nothing new
Problems for practice
Reading for next class: 7-6
9/15/09 - L27 Counters
Copyright Joanne DeGroat, ECE, OSU