Download presentation
Presentation is loading. Please wait.
1
L1S Jitter with AIP Modulator
Franz-Josef Decker 25-Sep-2014
2
L1S Phase Jitter History
0.04 deg deg it is bad now TDLY: Modulator pulse cuts into RF pulse HV higher and then better jitter is new! July 2014 Sep. 2014 TDLY: -5.7 -4.2 us HV: 300 320 kV
3
L1S HV Scan AIP modulator “allows” it 300 kV kV Phase Jitter [deg]
4
AIP SCR Modulator Upgrade (before and after)
L1X shows similar behavior to L1S Looks like timing jitter July Sep 2014
5
L1S Lost July Sep. Best for Sep
6
More L1S Reminder: 100 ppm 0.05 deg
Lowest timing jitter Maybe thyratron worse
7
Thyratron back swing jitter
It shouldn’t have this two state
8
L1S is Main Source of DL2 E-Jitter
L1S phase is nearly 75% of energy jitter power, (DE/E = %) And phase is 86 % correlated to HV Phase deg 86 % HV counts
9
Summary New L1S modulator and Klystron setup is 2-3 times worse
It “seems” to point to SCR switched AIP upgraded modulator Many more variations happened: new thyratron, 30120 Hz, -50 -75 V thyratron bias change, filter in trigger bypassed, LC for DQ-ing, Ross devider, … To do: Secondary power supply, …
Similar presentations
© 2025 SlidePlayer.com. Inc.
All rights reserved.