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TMBF Features Guenther Rehm
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Outline Bunch counter Bunch Min/Max on ADC/DAC
Per bunch function (FB/Ex/FB+EX/Off) and gain (-1..1) Bunch select for observation Excitation with swept sine wave I/Q demodulator with integration over programmable number of bunches 03/04/2008 TMBF Features
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Bunch Counter FPGA clock is ¼ of RF clock
Internal bunch counter advances every 4 bunches, but also knows which of the four processing chains is going to the output. Can be re-synchronised with an external trigger (to within 4 bunches) Counter is used by all other functions to reference bunch 03/04/2008 TMBF Features
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Development path Step FPGA design Control System User Interface 1
System Generator (from ESRF) EPICS (Register Interface) Matlab (From ESRF) 2 System Verilog (same registers) Matlab (ESRF+additions) 3 System Verilog (interface changes) (sensible channels) EDM screens 03/04/2008 TMBF Features
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Spectral Domain Record up to 32000 turns and FFT
Remove revolution frequency harmonics 230mA 170mA 125mA 03/04/2008 TMBF Features
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Time Domain Compared to Fill Pattern from Photon Counting
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Per Bunch Min/Max for ADC/DAC
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Per Bunch function: Example damp all bunches, excite one, knock out
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Grow/Damp Measurement
Excite mode for a brief period switch off excitation, close loop record mode amplitude, fit decay repeat for different modes vary gain 03/04/2008 TMBF Features
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Damping time per mode 03/04/2008 TMBF Features
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Sine Wave excitation and detection
Programmable sweep from 0 to 250MHz NCO produces cos/sin, cos goes to excitation Input is mixed with cos and sin, producing I/Q I/Q is integrated for programmable number of bunches Waveform with one point per frequency in the sweep is produced Can work on either all or one bunches Finer frequency resolution than FFT Sensitivity can be achieved either through strength of excitation or duration of integration Can operate invisibly to user beam 03/04/2008 TMBF Features
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Tune measurement of individual bunches
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Example: Tune Tracking
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