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C.k. Pithawalla Collage of Engineering & Technology surat
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C.k. Pithawalla Collage of Engineering & Technology surat
NAME EN NO Dhodia Hardik thakorbhai Patel Krunal Sanjaybhai Patel vivek Gambhirbhai Raj Chirag Sureshbhai
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Draw and explain interfacing of external program ROM with 8051
TOPIC Draw and explain interfacing of external program ROM with 8051 SEMICONDUCTOR MEMORY Memory organization Memory chips are organized into a number of locations within the IC. Each location can hold 1 bit, 4 bits, 8 bits, or even 16 bits, depending on how it is designed internally.
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SEMICONDUCTOR MEMORY Speed The speed of the memory chip
is commonly referred to as its access time. The access time of memory chips varies from a few nanoseconds to hundreds of nanoseconds, depending on the IC technology used in the design and abrication process.
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SEMICONDUCTOR MEMORY ROM (read-only memory) ROM is a type of memory that does not lose its contents when the power is turned off. For this reason, ROM is also called nonvolatile memory.
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SEMICONDUCTOR MEMORY PROM (programmable ROM) and OTP PROM is programmed by blowing the fuses. If the information burned into PROM is wrong, that PROM must be discarded since its internal fuses are blown permanently.
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EPROM (erasable programmable ROM) and UV-EPROM
SEMICONDUCTOR MEMORY EPROM (erasable programmable ROM) and UV-EPROM Pin Configurations for 27xx ROM Family
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SEMICONDUCTOR MEMORY
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SEMICONDUCTOR MEMORY EEPROM (electrically erasable programmable ROM)
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SEMICONDUCTOR MEMORY SRAM (static RAM) Storage cells in static
RAM memory are made of flip-flops and therefore do not require refreshing in order to keep their data. This is in contrast to DRAM.
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SEMICONDUCTOR MEMORY
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8051 INTERFACING WITH EXTERNAL ROM
EA pin Connect the EA pin to Vcc to indicate that the program code is stored in the mC's on-chip ROM. To indicate that the program code is stored in external ROM, this pin must be connected to GND.
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8051 INTERFACING WITH EXTERNAL ROM
Figure 14–8 74LS373 D Latch (Reprinted by permission of Texas Instruments, Copyright Texas Instruments, 1988)
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8051 INTERFACING WITH EXTERNAL ROM
Figure 14–9 Address/Data Multiplexing
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8051 INTERFACING WITH EXTERNAL ROM
Figure 14– Data, Address, and Control Buses for the 8031
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8051 INTERFACING WITH EXTERNAL ROM
8031 Connection to External Program ROM
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8051 INTERFACING WITH EXTERNAL ROM
PSEN
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8051 INTERFACING WITH EXTERNAL ROM
On-chip and off-chip code ROM In such a system we still have EA = Vcc, meaning that upon reset the 8051 executes the on-chip program first; then, when it reaches the end of the on-chip ROM it switches to external ROM for the rest of the program code.
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THANK YOU
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