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GWP.

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Presentation on theme: "GWP."— Presentation transcript:

1 GWP

2 Worldwide Shares for SCs manufacturing capacity in 2014
Worldwide Shares in 2014

3 M Faraday, 1833, decreasing silver sulfide resistance by heating (against copper wire)
A. E. Becquerel , 1839, generation of photovoltage at solid/liquid interface by lightening : PV effect W. Smith, 1873, decreasing selenium resistor by irradiation K.F. Braun, 1874, conduction and rectification effects in metal sulfides

4 Developing solid state physics
E.H. Hall, 1878, Hall effect (1930) B. Gudden : conductivity in semiconductors (1931), Alan Hurries and Wilson: band theory of conduction and the concept of band gaps Walter H. Schottky and Nevill Francis Mott: models of the potential barrier and of the characteristics of a metal-semiconductor junction J.J. Tomson , 1897, discovery of electron J Koenigsberger, 1914, classifying martials to metals, insulators and variable conductors (his student called in his thesis: semiconductors) F. Bloch, 1928, theory of electron mobility in atomic lattice.

5 Carbon (graphene) 1.00×10−8 Ωm
Silver ×10−8 Copper ×10−8 Annealed copper ×10−8 Gold ×10−8 Aluminium 2.82×10−8. Calcium ×10−8 Tungsten ×10−8 Zinc ×10− Silicon 6.40× Germanium 4.60×10−1 Sea water 2.00×10−1 Swimming pool water 3.33×10−1 Drinking water ×101 to 2.00×103 Deionized water ×105 Glass ×1011 Nickel ×10−8 Lithium ×10−8 Iron ×10−7 Platinum ×10−7 Stainless steel 6.90×10−7 Carbon (graphite) 2.50×10−6 to 5.00×10−6 //basal plane 3.00×10−3 ⊥basal plane

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10 Czochralski crystal puller

11 300-mm (12 in.) and 400 mm (16 in.) Czochralski-grown silicon ingots.

12 . 33) 200-mm (8 in.) and 400-mm (16 in.) polished silicon wafers in cassettes.

13 Point defects. (a) Substitutional impurity. (b) Interstitial impurity
Point defects. (a) Substitutional impurity. (b) Interstitial impurity. (c) Lattice vacancy. (d) Frenkel-type defect.

14 (a) Edge and (b) screw dislocation formation in cubic crystals.

15 Stacking faults in semiconductor. (a) Intrinsic stacking fault
Stacking faults in semiconductor. (a) Intrinsic stacking fault. (b) Extrinsic stacking fault.

16 Distribution of Dopant
Segregation coefficient : k0

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18 Bipolar transistors.

19 Figure 1. 2 (p. 3) The first transistor
Figure 1.2 (p. 3) The first transistor. (Photograph courtesy of Bell Laboratories)

20 Figure 1.3 (p. 4) The first metal-oxide-semiconductor field-effect transistor. (Photograph courtesy of Bell Laboratories

21 Figure 1. 4 (p. 7) The first monolithic integrated circuit
Figure 1.4 (p. 7) The first monolithic integrated circuit. (Photograph courtesy of Dr. G. Moore.)

22 Figure 1. 5 (p. 9) The first microprocessor
Figure 1.5 (p. 9) The first microprocessor. (Photograph courtesy of Intel Corp.)

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25 Photo: Molecular beam epitaxy (MBE) in action
Photo: Molecular beam epitaxy (MBE) in action. MBE takes place in ultra-high vacuum (UHV) chambers like this, at temperatures of around 500°C (932°F), to ensure a totally clean, dust-free environment; the slightest contamination could ruin the crystal. Photo by Jim Yost courtesy of US DOE/NREL (U.S. Department of Energy/National Renewable Energy Laboratory).

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