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Microprocessor.

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Presentation on theme: "Microprocessor."— Presentation transcript:

1 microprocessor

2 INFT13-339 16-bit Intel Assembler

3 Administrative Details

4 History of microprocessors

5 Microprocessor evolution
The application of information technology is driven by the price-performance capability of microprocessors. A microprocessor (µP) is a single integrated component which implements all the functions of a Central Processing Unit on a single logic device—the silicon chip.

6 Microcomputers A microcomputer is a complete computer system whose CPU is a microprocessor. The number of individual logic components on a single chip has increased exponentially, doubling every two years, over the last decade and a half.

7 History of chip fabrication
1964 Small-Scale Integration: 1­10 transistors/chip 1968 Medium-Scale Integration: <100 transistors/chip 1971 Large-Scale Integration using MOS (Metal- Oxide on Silicon) 100­20,000 transistors/chip 1980 Very Large-Scale Integration (VLSI) >50,000 transistors/chip

8 µP Architecture Overview

9 Microcomputer components
Input Output Memory ALU Control Unit Bus µP

10 Microcomputer components
5 fundamental components: Arithmetic-Logical Unit (ALU) for data manipulation. Control Unit to control and synchronize operations and data flow within the ALU and along the buses. Memory to hold program instructions & data. Input Module to transmit data from the external world. Output Module: send data to external world.

11 Buses A bus is a high-speed path for the transmission of data and control information. A bus consists of a set of lines each capable of transmitting a single, bi-state signal. There are three main types of bus: Data Address Control

12 Buses Memory Microprocessor Input/output Data Bus Control Bus
Address Bus Memory Microprocessor Input/output

13 Data Bus A data bus transmits data in byte multiples between ALU, Input-Output and Memory.

14 Address Bus Address Bus carries an address value to select a memory location or register (usually consists of between 16 and 32 lines) to address between 65,536 (64K) and 4,294,967,296 bytes of memory.

15 Control Bus Control Bus carries control and status signals to and from the µP. At least 10 lines are required for the simplest µP. Typically between 25 and 50 control lines.

16 Memory: registers Memory exists in a number of forms:
Internal registers to provide a small number of very high speed data storage units within the ALU. Typical access speeds are 100 nanoseconds or better.

17 Memory: primary (RAM) Main Memory external to the µP chip holds the bulk of the immediately accessible program and data. Access time is from a few µs to several tens of nanoseconds. Data flows between memory and the ALU along the Data and Address buses.

18 Main Memory RAM Random Access Memory—Read/Write memory, contents lost on power down, i.e. volatile.

19 ROM ROM Read Only Memory—contents read-only and not lost on power down, i.e. non-volatile. PROM Programmable ROM— the contents can be burned-in by the user using special ROM burners which employ high voltages.

20 Static RAM Stores a bit of information within a flip-flop.
Its contents are held as long as power is available. The density of packing flip-flops is relatively low, leading to capacities of about 256K bits per chip. Speed of access is also lower.

21 Dynamic RAM The great disadvantage is the the charge lasts for only a few milliseconds and will be lost unless continually refreshed. This consists of reading out the memory contents and then writing it back. Thus extra logic is required and the memory is unavailable for 1%­5% of the time.

22 Register categories Instruction Register Data Registers
holds the current instruction value. Data Registers hold data operands and results. These are typically 8, 16 or 32 bits in length. Address Registers hold primary memory address values. These are typically 16 or 32 bits in length.

23 Flags register This is a special 16-bit register which holds processor flags; these indicate the status of the CPU after recent operations 9 bits are used; 7 undefined: overflow zero auxiliary carry parity carry direction interrupt trap sign

24 Reference

25 THANK YOU


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