Download presentation
Presentation is loading. Please wait.
Published byTerence Barry Lee Modified over 6 years ago
1
Overview Introduction Logic Gates Flip Flops Registers Counters
Review of Basics of Digital Electronics Lecture 3 Overview Introduction Logic Gates Flip Flops Registers Counters Multiplexer/ Demultiplexer Decoder/ Encoder CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
2
Multiplexer/Demultiplexer
Review of Basics of Digital Electronics Lecture 3 Multiplexer/Demultiplexer 4-to-1 Multiplexer I0 I1 I2 I3 S0 S1 Y I0 I1 I2 I3 Select Output S1 S Y Combinational circuit that receives binary information from one of 2n input data lines and directs it to a single input line Also called data selector De-multiplexer works in opposite manner, accepts single input line and produces 2n output lines
3
Review of Basics of Digital Electronics 3 Lecture 3
Decoder/Encoder 1 d d E A1 A0 D0 D1 D2 D3 2-to-4 Decoder Combinational circuit that converts binary information from the n coded inputs to a maximum of 2n unique outputs A decoder with n inputs and m outputs is referred to as n X m decoder, where m<= 2n Decoder is enabled when E=1 Encoders works in opposite manner, accepts 2n input lines and produces n outputs A0 A1 E D0 D1 D2 D3
4
De-multiplexer :
5
Octal to Binary Encoder
Review of Basics of Digital Electronics Lecture 3 Decoder/Encoder D7 D6 D5 D4 D3 D2 D1 D0 A2 A1 A0 Octal to Binary Encoder D1 D2 D3 D5 D6 D7 D4 A0 A1 A2 A0 = D1 + D3 + D5 + D7 A1 = D2 + D3 + D6 + D7 A2 = D4 + D5 + D6 + D7 CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
6
Decoder Expansion Review of Basics of Digital Electronics 6 Lecture 3
CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT
Similar presentations
© 2025 SlidePlayer.com. Inc.
All rights reserved.