1. CISE204: Design of Digital Systems Lecture 18 : Sequential Circuits
Dr. Samir Al-Amer
(Term 101)
Reading Assignment: Section

2. Outlines Sequential circuits vs Combinational circuits
Synchronous Sequential Circuits
Asynchronous Sequential circuits
Latches
Flip flops

3. Sequential Circuits Input Combinational Circuit Output Memory Element
The output of a sequential circuit depends on the input and the information stored in the memory elements

4. Synchronous Clocked Sequential Circuits
Input
Combinational
Circuit
Output
Flip Flop
Clock Pulses

5. SR Latch with NOR gates R(reset) Q S(set) Q’1
R(reset)
S(set) Q Q’
S R Q Q’ . 1
S = R = 0 gives Q = 1,Q’ = 0 if it comes after S=1,R=0
S = R = 0 gives Q = 0,Q’ = 1 if it comes after S=0,R=1
S = R = 1 is not allowed because what comes after is not predictable

6. SR Latch with NAND gates1
R(reset)
S(set) Q Q’
S R Q Q’ . 1
S = R = 1 gives Q = 0,Q’ = 1 if it comes after S=1,R=0
S = R = 1 gives Q = 1,Q’ = 0 if it comes after S=0,R=1
S = R = 0 is not allowed because what comes after is not predictable

7. SR Latch with Control R(reset) S(set) C S R output 0 X X No Change
C (Control)
S(set)
C S R output
0 X X No Change
No Change
Q=0
Q=1
indeterminate

8. D-Latch with Control C (Control) is used to activate the Latch D
C D output
0 X No Change
Q=0 Reset
Q=1 Set
C (Control) is used to activate the Latch

9. Graphic Symbols for Latches SR Latch

10. Graphic Symbols for Latches SR Latch with inverted inputs

11. Graphic Symbols for Latches D Latch with Control

12. Positive Level Positive Edge Negative Edge
Some circuit are designed to be active when the triggering signal is positive
Positive Edge
Some circuit are designed to be active when the triggering signal goes from Low to High
Negative Edge

13. D- Flip Flop D-Flip Flop can be constructed from two D-latchesQ
D- Latch
(Master)
D- Latch
(Slave) D D C D C
CLK
D-Flip Flop can be constructed from two D-latches
Most common, efficient Flip Flop
Other Flips Flops can be constructed using D-Flip Flops

14. Positive Edge Triggered D-Flip FlopQ
CLK
Positive Edge Q’ D

15. Edge Triggered D-Flip Flops
Positive
Edge
Triggered
D-Flip Flop
Negitive
Edge
Triggered
D-Flip Flop D C D C
Positive Edge

16. JK Flip Flops JK Flip Flop can be constructed from D-Flip Flop JK

17. T Flip Flop T-Flip Flop can be constructed from JK Flip Flop T

18. T Flip Flop Construction using D flip Flop
T-Flip Flop can be constructed from D- Flip Flop

19. Characteristic Tables
A characteristic table is used to define the properties of a flip flop
Q(t): present State
Q(t+1): Next state J K
Q(t+1)
Q(t) No change 1
Reset
Set
Q’(t) complement
Characteristic Table of JK Flip Flop

20. Characteristic Tables
A characteristic table is used to define the properties of a flip flop D
Q(t+1) 1
Characteristic Table of D Flip Flop T
Q(t+1)
Q(t) no change 1
Q’(t) complement
Characteristic Table of D Flip Flop

21. Characteristic Equation
Characteristic equation: Algebraic expression defining the next state in terms of inputs and present state
D Flip Flop Q(t+1) = D
JK Flip Flop Q(t+1) = J Q’+ K’Q
T Flip Flop Q(t+1) = T Q’+ T’Q

22. Direct Input
Used to force the flip flop to take a particular state independent of clock
When a sequential circuit is turned ON, it is important to initialize Q(t)
Direct input
Direct Reset (Clear) (Q0)
Direct Set (Preset ) (Q1)

23. D-Flip Flop with Asynchronous ResetQ
CLK
Positive Edge Q’ D R

24. Positive Edge Triggered D-Flip Flop with Asynchronous ResetQ D
Flip Flop
R C D Q Q’
X X   D C Q’ R
 indicates that the Flop Flip is triggered on positive edge of the clock

25. Flip Flops Operating Characteristics
Propagation Delay: The time needed after an input signal has been applied for an output change to occur
Four Categories of Propagation Delay
CLK to LOW-HIGH
CLK to HIGH - LOW
PRESET to LOW-HIGH
CLEAR to HIGH - LOW
CLK Q
Propagation Delay
CLK Q
Propagation Delay

26. Flip Flops Operating Characteristics
Set-up Time
Hold Time
Pulse Width
Maximum Clock Frequency
Power Dissipation
Homework Activity
Search the internet for a commercial D-Flip Flop and list some of its characteristics

27. Summary Latches are basic memory elements
Flip Flops are made using Latches
SR, SR, D, latches
D-Flip Flops
JK, T Flip Flops
Flip Flop Characteristics