1. EE 5340 Semiconductor Device Theory Lecture 25 – Spring 2011
Professor Ronald L. Carter

2. Ideal 2-terminal MOS capacitor/diode
conducting gate,
area = LW
Vgate
-xox
SiO2 y L
silicon substrate
tsub
Vsub x
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3. MOS surface states** p- substr = n-channel
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4. MOS Bands at OSI p-substr = n-channel
Fig 10.9*
2q|fp|
qfp
xd,max
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5. Equivalent circuit for accumulation
Accum depth analogous to the accum Debye length = LD,acc = [eVt/(qps)]1/2
Accum cap, C’acc = eSi/LD,acc
Oxide cap, C’Ox = eOx/xOx
Net C is the series comb
C’Ox
C’acc
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6. Equivalent circuit for Flat-Band
Surface effect analogous to the extr Debye length = LD,extr = [eVt/(qNa)]1/2
Debye cap, C’D,extr = eSi/LD,extr
Oxide cap, C’Ox = eOx/xOx
Net C is the series comb
C’Ox
C’D,extr
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7. Equivalent circuit for depletion
Depl depth given by the usual formula = xdepl = [2eSi(Vbb)/(qNa)]1/2
Depl cap, C’depl = eSi/xdepl
Oxide cap, C’Ox = eOx/xOx
Net C is the series comb
C’Ox
C’depl
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8. Equivalent circuit above OSI
Depl depth given by the maximum depl = xd,max = [2eSi|2fp|/(qNa)]1/2
Depl cap, C’d,min = eSi/xd,max
Oxide cap, C’Ox = eOx/xOx
Net C is the series comb
C’Ox
C’d,min
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9. Differential charges for low and high freq
From Fig 10.27*
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10. Ideal low-freq C-V relationship
Fig 10.25*
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11. Comparison of low and high freq C-V
Fig 10.28*
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12. Effect of Q’ss on the C-V relationship
Fig 10.29*
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13. Flat band condition (approx. scale)
SiO2
p-Si
q(fm-cox)= 3.15 eV
q(cox-cSi)=3.1eV
Ec,Ox
qffp= 3.95eV
EFm Ec
Eg,ox~8eV
EFi
EFp Ev Ev
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14. Flat-band parameters for n-channel (p-subst)
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15. Flat-band parameters for p-channel (n-subst)
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16. Typical fms values
Fig 10.15*
fms
(V)
NB (cm-3)
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17. Flat band with oxide charge (approx. scale)
SiO2
p-Si
+<--Vox-->-
q(Vox)
Ec,Ox
q(ffp-cox)
q(fm-cox) Ex
Eg,ox~8eV
EFm Ec
EFi
EFp
q(VFB) Ev
VFB= VG-VB, when Si bands are flat Ev
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18. Inversion for p-Si Vgate>VTh>VFB
Vgate> VFB
EOx,x> 0
e- e- e- e- e-
Depl Reg
Acceptors
Vsub = 0
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19. Approximation concept “Onset of Strong Inv”
OSI = Onset of Strong Inversion occurs when ns = Na = ppo and VG = VTh
Assume ns = 0 for VG < VTh
Assume xdepl = xd,max for VG = VTh and it doesn’t increase for VG > VTh
Cd,min = eSi/xd,max for VG > VTh
Assume ns > 0 for VG > VTh
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20. MOS Bands at OSI p-substr = n-channel
Fig 10.9*
2q|fp|
qfp
xd,max
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21. Computing the D.R. W and Q at O.S.I.Ex
Emax x
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22. Calculation of the threshold cond, VT
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23. Equations for VT calculation
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24. Fully biased n-MOS capacitorVG
Channel if VG > VT VS VD
EOx,x> 0 n+
e- e- e- e- e- e- n+
p-substrate
Vsub=VB
Depl Reg
Acceptors y
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25. MOS energy bands at Si surface for n-channel
Fig 8.10**
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26. Computing the D.R. W and Q at O.S.I.Ex
Emax x
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27. Q’d,max and xd,max for biased MOS capacitor
Fig 8.11**
xd,max
(mm)
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28. Fully biased n- channel VT calc
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29. n-channel VT for VC = VB = 0
Fig 10.20*
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30. Fully biased p- channel VT calc
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31. p-channel VT for VC = VB = 0
Fig 10.21*
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32. n-channel enhancement MOSFET in ohmic region
0< VT< VG
Channel
VS = 0
0< VD< VDS,sat
EOx,x> 0 n+
e-e- e- e- e- n+
Depl Reg
p-substrate
Acceptors
VB < 0
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33. Conductance of inverted channel
Q’n = - C’Ox(VGC-VT)
n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2)
The conductivity sn = (n’s/t) q mn
G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so
I = V/R = dV/dR, dR = dL/(n’sqmnW)
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34. Basic I-V relation for MOS channel
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35. I-V relation for n-MOS (ohmic reg)ID
non-physical
ID,sat
saturated
VDS,sat
VDS
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36. References
* Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997.
**Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986
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37. Computing the D.R. W and Q at O.S.I.Ex
Emax x
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