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Subject Name:COMPUTER NETWORKS-1
Subject Code:10CS55 Prepared By:Shruthi N, Krishna sowjanya.k, santhiya Department: CSE
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Engineered for Tomorrow
Multiplexing Multiplexing is the simultaneous transmission of multiple signals across a single data link. In a multiplexed system, n lines share the bandwidth of one link. 1 link, n channels n signals (input) M U X D E M U X n signals (output) Multiplexer Demultiplexer
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Engineered for Tomorrow
Multiplexing Multiplexing is the simultaneous transmission of multiple signals across a single data link. In a multiplexed system, n lines share the bandwidth of one link There are three basic multiplexing techniques: frequency-division multiplexing. wavelength-division multiplexing. time-division multiplexing.
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Frequency Division Multiplexing (FDM)
Engineered for Tomorrow Frequency Division Multiplexing (FDM) Medium BW > Channel BW Each signal is modulated to a different carrier frequency E.g., broadcast radio Channel allocated even if no data An analog multiplexing technique to combine signals
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Conceptual View of FDM Channel 3 Channel 2 Channel 1 Time f3 f2 f1
Engineered for Tomorrow Conceptual View of FDM Channel 3 Channel 2 Channel 1 f1 f2 f3 Frequency Time
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FDM: Multiplexing Process
Engineered for Tomorrow FDM: Multiplexing Process
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FDM: Demultiplexing Process
Engineered for Tomorrow FDM: Demultiplexing Process
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Analog Hierarchy Used by AT&T … … 12 voice channels F D M F D M F D M
Engineered for Tomorrow Analog Hierarchy Used by AT&T 4 kHz 48 kHz 12 voice channels 12 voice channels 4 kHz … 240 kHz 60 voice channels group F D M 2.52 MHz 600 voice channels 5 groups supergroup F D M … 10 supergropus master group MHz 3600 voice channels F D M 6 master groups Jumbo group F D M
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Wavelength Division Multiplexing (WDM)
Engineered for Tomorrow Wavelength Division Multiplexing (WDM) An analog multiplexing technique to combine optical signals WDM is a special case of FDM WDM 1 2 3 1+2+3 1 1 Multiplexer Demultiplexer 1+2+3 Fiber-optic cable 2 2 3 3
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Time Division Multiplexing (TDM)
Engineered for Tomorrow Time Division Multiplexing (TDM) A digital multiplexing technique to combine data Medium Data Rate > Signal Data Rate Multiple digital signals interleaved in time Time slots are preassigned to sources and fixed are allocated even if no data do not have to be evenly distributed among sources one unit T D M A B C Frame Time slot
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Conceptual View of TDM M U X 1 2 3 1 Data flow 2 D E M U X 3 Time
Engineered for Tomorrow Conceptual View of TDM M U X 1 2 3 1 Data flow 2 3 2 1 3 2 1 3 2 1 D E M U X 3 Time Frequency Channel 3 Channel 2 Channel 1
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TDM Frames A frame consists of one complete cycle of time slots
Engineered for Tomorrow TDM Frames A frame consists of one complete cycle of time slots
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Engineered for Tomorrow
Interleaving Multiplexing side:As the switch opens in front of a connection, that connection has the opportunity to send a unit onto the path. This process is called interleaving. Demultiplexing side: as the switch opens in front of a connection, that connection has the opportunity to receive a unit from the path
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Data Rate Management Not all input links maybe have the same data rate. Some links maybe slower. There maybe several different input link speeds There are three strategies that can be used to overcome the data rate mismatch: multilevel, multislot and pulse stuffing 6.14
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Engineered for Tomorrow
Data rate matching Multilevel: used when the data rate of the input links are multiples of each other. Multislot: used when there is a GCD between the data rates. The higher bit rate channels are allocated more slots per frame, and the output frame rate is a multiple of each input link. Pulse Stuffing: used when there is no GCD between the links. The slowest speed link will be brought up to the speed of the other links by bit insertion, this is called pulse stuffing.
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Multi-Level Multiplexing
Engineered for Tomorrow Multi-Level Multiplexing
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Multiple-slot multiplexing
Engineered for Tomorrow Multiple-slot multiplexing
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Pulse stuffing
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Synchronization To ensure that the receiver correctly reads the incoming bits, i.e., knows the incoming bit boundaries to interpret a “1” and a “0”, a known bit pattern is used between the frames. The receiver looks for the anticipated bit and starts counting bits till the end of the frame. Then it starts over again with the reception of another known bit. These bits (or bit patterns) are called synchronization bit(s). They are part of the overhead of transmission.
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Engineered for Tomorrow
Framing bits
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DS Services and T Lines DS-0, DS-1, etc, are services
Engineered for Tomorrow DS Services and T Lines DS-0, DS-1, etc, are services T lines are used to implement these services Service Line Rate (Mbps) Voice Channels DS-1 T-1 1.544 24 DS-2 T-2 6.312 96 DS-3 T-3 44.736 672 DS-4 T-4 4032
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T Lines and Analog Signals
Engineered for Tomorrow T Lines and Analog Signals
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Engineered for Tomorrow
T-1 Frame Structure
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E Lines European's version of T lines Also used in Thailand E Line
Engineered for Tomorrow E Lines European's version of T lines Also used in Thailand E Line Rate (Mbps) Voice Channels E-1 2.048 30 E-2 8.448 120 E-3 34.368 480 E-4 1920
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Statistical Time-Division Multiplexing
Engineered for Tomorrow Statistical Time-Division Multiplexing In statistical time-division multiplexing, slots are dynamically allocated to improve bandwidth efficiency. Only when an input line has a slot's worth of data to send is it given a slot in the output frame. In statistical multiplexing, the number of slots in each frame is less than the number of input lines. The multiplexer checks each input line in roundrobin fashion; it allocates a slot for an input line if the line has data to send; otherwise, it skips the line and checks the next line.
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Synchronous and statistical TDM
Engineered for Tomorrow Synchronous and statistical TDM
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Spread Spectrum Spread signal to use larger bandwidth
Engineered for Tomorrow Spread Spectrum Spread signal to use larger bandwidth To prevent eavesdropping To reduce effect from interference
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Frequency-Hopping SS "FHSS" – Frequency-Hopping Spread Spectrum
Engineered for Tomorrow Frequency-Hopping SS "FHSS" – Frequency-Hopping Spread Spectrum Used in Bluetooth technology
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FHSS Cycles Engineered for Tomorrow
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Direct-Sequence SS "DSSS" – Direct-Sequence Spread Spectrum
Engineered for Tomorrow Direct-Sequence SS "DSSS" – Direct-Sequence Spread Spectrum Used in Wireless LANs
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DSSS and Interference Amplitude Narrow Band Signal
Engineered for Tomorrow DSSS and Interference Frequency Amplitude Narrow Band Signal Narrow Band Interference Spread Spectrum Signal
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Engineered for Tomorrow
DSSS Example
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Introduction to switching
Engineered for Tomorrow Introduction to switching Switched networks Long distance transmission between stations (called “end devices”) is typically done over a network of switching nodes. Switching nodes do not concern with content of data. Their purpose is to provide a switching facility that will move the data from node to node until they reach their destination (the end device). A collection of nodes and connections forms a communications network. In a switched communications network, data entering the network from a station are routed to the destination by being switched from node to node
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Engineered for Tomorrow
A Switched network
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Taxonomy of switched networks
Engineered for Tomorrow Taxonomy of switched networks
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Circuit switched Networks
Engineered for Tomorrow Circuit switched Networks Circuit switching: There is a dedicated communication path between two stations (end-to-end) The path is a connected sequence of links between network nodes. On each physical link, a logical channel is dedicated to the connection. Communication via circuit switching has three phases: Setup phase Resource allocation (FDM or TDM) Data transfer phase Tear down phase Deallocate the dedicated resources The switches must know how to find the route to the destination and how to allocate bandwidth (channel) to establish a connection
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Engineered for Tomorrow
A circuit-switched network is made of a set of switches connected by physical links, in which each link is divided into n channels.
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Delay in a circuit switched network
Engineered for Tomorrow Delay in a circuit switched network
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Datagram Networks Each packet is treated independently of all others.
Engineered for Tomorrow Datagram Networks Each packet is treated independently of all others. Packets in this approach are referred to a datagrams Datagram switching is normally done at the network layer. Datagram networks are also referred to as connectionless networks. There are no setup or tear down phases.
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A datagram network with four switches (routers)
Engineered for Tomorrow A datagram network with four switches (routers)
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Routing Table In datagram networks,each switch has a routing table which is based on the destination address. Routing tables are dynamic and are updated periodically. The destination address and the corresponding forwarding output ports are recorded in the tables
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Routing table in a datagram network
Engineered for Tomorrow Routing table in a datagram network
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Delay is more in datagram network than in virtual circuit network
Engineered for Tomorrow Destination address Every packet in datagram network carries a header that contains destination address of the packet When switch recieves packet,this destination address is examined,routing table is consulted to find path. Efficiency Efficiency of datagram network is better than of circuit switche network as resources are allocated only when there are packets to be transferred. Delay Delay is more in datagram network than in virtual circuit network
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Delay in a datagram network
Engineered for Tomorrow Delay in a datagram network
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Virtual Circuit Networks
Engineered for Tomorrow Virtual Circuit Networks A virtual-circuit network is a cross between a circuit-switched network and a datagram network. There are setup and teardown phases in addition to data transfer phase. Resources can be allocated during setup phase or on demand Data are packetized and each packet carries an address in the header.but address in header has local jurisdiction. All packets follow the same path established during the connection Virtual circuit network is implemented in the data link layer. Two types of addressing are used:global and local
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Virtual-circuit network
Engineered for Tomorrow Virtual-circuit network
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Virtual circuit Identifier
Engineered for Tomorrow Virtual circuit Identifier The identifier used for data tranfer is called virtual circuit identifier(VCI)
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Three phases Data Transfer phase
Engineered for Tomorrow Three phases Data Transfer phase To transfer a frame from source to destination,all switches need to have a table entry for this virtual circuit Fig shows a frame arriving at port1 with a VCI of 14
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Source-to-destination data transfer in a virtual-circuit network
Engineered for Tomorrow Source-to-destination data transfer in a virtual-circuit network
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Setup phase In setup phase,a switch creates an entry for a virtual circuit.Two steps are required Setup request A setup request is sent from the source to the destination as shown
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Acknowledgement A special fram,called acknowledgement frame,completes the entries in the switching tables.
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Delay in a virtual-circuit network
Engineered for Tomorrow Delay in a virtual-circuit network
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Thank You……
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