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Published byAbraham Melton Modified over 6 years ago
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DAQ Interface for uTCA E. Hazen - Boston University
for the CMS Collaboration E. Hazen -- Electronics Week
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E. Hazen -- Electronics Week
AMC13 Hardware Tongue 3 PCB (optional, for initial programming) (4) SFP+ Sites 1 for TTC (160Mb) 3 for DAQ/etc 6.2Gb Atmel AVR-32 uC MMC Functions Micro USB MMC serial console Tongue 2 PCB Tongue 1 PCB Spartan 6 FPGA Fabric B TTC distribution Firmware management interface to MMC Virtex-6 LX130T FPGA DAQ Functions, buffering 6Gb links to backplane, SFP JTAG Headers MMC programming FPGA programming E. Hazen -- Electronics Week
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E. Hazen -- Electronics Week
AMC13 in DAQ test crate DAQ Output TTC In / TTS Out E. Hazen -- Electronics Week
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MicroTCA Interface to CMS (Interim)
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MicroTCA Interface to CMS (Ultimate?)
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Prototype Link Requirements
Transfer data at line speed Survive BER (~ 1 error/sec) with negligible loss in throughput and error rate. Provide low-bandwidth return channel for link monitoring, or other purposes Easy to implement in commodity FPGAs Simple enough to describe in 1 slide! (maybe ) E. Hazen -- Electronics Week
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Prototype DAQ Link Firmware (Emulates SLINK-64)
DAQLSC.vhd DAQLDC.vhd GTX GTX SysClk LinkClk LinkWe LinkRe LinkCtrl LinkWe 64 LinkData LinkCtrl LinkAlmostFull 64 LinkDown LinkData 16 LinkDown SrcID 16 Src_ID 16 Addr 64 Status E. Hazen -- Electronics Week
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Prototype DAQ Link Format Data rate = 5.0 Gb/s
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Some more protocol details...
LSC sends init packet with Link ID, waits for ACK LSC breaks data into 4k packets Send up to ~ 4 packets, wait for ACK If ACK seen, delete packet from queue If no ACK in 215 bit periods (65 us), re-send last non-acknowledged packet LDC receives packets, checks CRC, ACKs correctly- formed packets. No ACK sent if packet has error No ACK send if Rx buffer is full E. Hazen -- Electronics Week
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E. Hazen -- Electronics Week
Status and Plans Implement receiver for 5Gb/s link in MOL (underway!) Test and discuss/modify protocol Implement DAQ for HCAL Receive data from AMC cards (see backup slides) Transmit to MOL (can receive in AMC13 and readout over Ethernet in interim) Establish specifications for 10Gb/s link and start development of next gen AMC13 E. Hazen -- Electronics Week
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E. Hazen -- Electronics Week
Backup Slides E. Hazen -- Electronics Week
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TTC / Clocks Note: no TTCrx ASIC required! 2011-11-08
E. Hazen -- Upgrade Week
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Backplane Links 2011-11-08 E. Hazen -- Upgrade Week
AMC Modules (uHTR / MiniCTR) 12 point-to-point links AMC13 (DTC) BU provided firmware 160MHz Biphase mark Fabric B TTC Receiver LHC clock L1A IO IO BC0 etc 2.5Gb/s 8b/10b Fabric A Level 1 Trigger MUX TP[0:7] BC0 MGT MGT CLK Level 2 DAQ 16 Data Framing Buffer Status E. Hazen -- Upgrade Week
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