1. CSE 575 Computer Arithmetic Spring 2005 Mary Jane Irwin (www. cse. psu
CSE 575 Computer Arithmetic Spring Mary Jane Irwin (

2. “Arithmetic is being able to count up to twenty without taking off your shoes”
-- Mickey Mouse

3. synchronous word parallel adders
Binary Adders
synchronous word parallel adders
ripple carry adders (RCA) carry prop min adders
signed-digit fast carry prop residue
adders adders adders
Manchester carry carry prefix cond. carry
carry chain select lookahead sum skip
T = O(n), A = O(n)
T = O(1), A = O(n)
speed versus complexity versus power consumption but have to worry about constants
also have bit (digit) serial adders and asynchronous adders
T = O(n), A = O(n)
T = O(log n)
A = O(n log n)
T = O(n),
A = O(n)

4. Review: Adder Comparisons

5. Coping with Carries
Speed up propagation via lookahead and other methods
Limit carry propagation to within a small number of bits
residue
Detect the end of propagation rather than wait for worst-case time
asynchronous
Eliminate carry propagation altogether!
1 - residue number systems
2 - asynchronous adders

6. For Example 3 6 9 8 addend 4 7 augend interim sum carry 7 3 1 -1 1 2 1
augend
interim
sum
carry 7 3 1 -1 1 2 1
for lecture
Consider a decimal example where the carry ripples from the lsd to the msd
Note that all of the interim sums and carries can be computed in PARALLEL.
What’s the catch???
interim sum: -8 to interim carry: -1 to 1

7. Signed-Digit Representation
Allow more digits in the digit set than r
r=2, d=[-1,0,1]
r=4, d=[-3,-2,-1,0,1,2,3] or d=[-2,-1,0,1,2,3] or d=[-3,-2,-1,0,1,2] or d=[-2,-1,0,1,2]
symmetric
maximally redundant
asymmetric
minimally redundant
symmetric versus assymmetric
The result is that numbers have more than one representation (redundant)
r=  0110 and and 1-110

8. 2  + 1 > r so  > (r+1)/2
Formal Definitions
Signed-digit representation for base r has the digit set
[- ,-  -1, …,-1, 0, 1, …, -1, ]
where  is in the range
(r+1)/2 <   r-1
More than r digits in the digit set guarantees redundancy
2  + 1 > r so  > (r+1)/2
(symmetric)
r=2, alpha=1; r=3, alpha=2; r=4, alpha=2; r=5, alpha=3; r=6, alpha=3; r=7, alpha=4; r=8, alpha=4
In base 4, with two digits
Maximally redundant, -3-3 to 33, 7**2 = 49 reps, but 31 distinct numbers (-15 to +15)
Minimally redundant, -2-2 to 22, 5**2=25 reps, but 21 distinct numbers (-10 to +10) so more numbers have two (or more) reps in maximally than minimally redundant, but some numbers have only ONE rep
Redundancy coefficient k = alpha/(r-1) and if k=1 maximally redundant, K = 1/2, no redundancy
minimally redundant
maximally redundant

9. Redundant Rep. Facts
The representation of zero is unique (and is the bit string all zeros)
The sign of a redundantly represented number is the sign of the most significant non-zero digit (so there is no need for a “separate” sign bit/digit)
The complement of a redundantly represented number is simply computed by changing the sign of every (non-zero) digit
can you prove them? (proof by contradiction for the first two)

10. Conversion
Conversion to a conventional representation is equivalent to rippling the carry (subtract the negative digits from the positive digits) =
0 0 1

11. Representation Overhead
base 2 3 4 8 10 16 32
#bits red. 5 6
#bits conv. 1
overhead
100%
50%
33%
25%
20%
So in 8 bits can represent 2 2/3 base 4 signed digits (as opposed to 3 digits + sign in conventional), so there is some representation loss

12. Redundant Rep. Uses
Used to eliminate (or severely limit) the carry in addition
Used to recode multipliers to reduce the number of partial products
recoding the multiplier digits from the digit set 0, 1, 2, 3 to the digit set -2,-1,0,1,2 doubles the speed of multiplication
Used to make quotient digit selection easier in division (SRT and higher radix division)

13. Signed-Digit Addition
xi+1
yi+1 xi yi
xi-1
yi-1
ici
ici+1
isi-1
isi
ici+2
isi+1 I
I isi = (xi+yi) - r ici+1
where
ici+1[-1,0,1]
isi[-(r-2),…-1,0,1,
…(r-2)]
carry
chain si
si+1 II
xi, yi, and si all in the signed-digit set -(r-1) to +(r-1)
II si = isi + ici
Range on si should be the same as the range on either xi or yi, so si can be reused as an input operand in latter additions

14. Base 4 Redundant Addition
Box I
xi+yi
ici+1
isi -6 -1 -2 -5 -4 -3 1 2 3 4 5 6
xi, yi, si  [-3,-2,-1,0,1,2,3] xi yi
xi-1
yi-1
yi+1
xi+1
ici
ici+1
ici+2
isi-1
isi
isi+1 I
ici+1  [-1,0,1] si
si+1 II
isi  [-2,-1,0,1,2]
Addition only possible if we can span the range of xi + yi with the digit sets allowed for isi and ici+1
isi + 4 ici+1 = xi + yi = -6 to +6
xi, yi, si and isi can each be encoded
in 3 bits; ici+1 can be encoded in 2 bits

15. Base 4 Example 1 3 -3 -2 X 2 -1 Y
xi+yi IS IC S 3 -1 1 6 2 1 -5
-1 -1 2 -2 1 -3 1 -1 4 1
for lecture
in nonredundant

16. Possible Implementations
Carry chain ripple limited to one digit position!
I&II I II
3bRCA
For lecture
tradeoffs in complexity - number of cells, fan-in of cells
separate I and II cells - lower fan-in, two cell level delay, all custom logic (II is really just a 3b RCA)
merged I and II cells - bigger fan-in, one cell level delay (but probably a slower cell time), all custom logic
using RCA’s - only custom logic is the middle “correct” cell

17. Signed-Digit Addition – Base 2?
xi+1
yi+1 xi yi
xi-1
yi-1
I isi = (xi+yi) - r ici+1
where
xi and yi [-1,0,1]
ici+1[-1,0,1]
isi[-(r-2),…-1,0,1,
…(r-2)] = [0] !!
ici
ici+1
isi-1
isi
ici+2
isi+1 I si
si+1 II
xi, yi, and si all in the signed-digit set -(r-1) to +(r-1)
Apparently doesn’t work for base 2 ?
But there is a way to make it work by letting carries ripple two positions

18. Redundant Binary Additionxi yi
xi-1
yi-1
xi-2
yi-2
I xi, yi, si  [-1,0,1]
tci  [0,1] Ii I I
II xi+yi = 2 ici+1 + isi
where
when tci-1 = 0
ici+1[0,1], isi[-1,0]
when tci-1 = 1
ici+1[-1,0], isi[0,1]
tci
tci-1
tci-2
IIi II
ici-1
Note the carry chain of two digits
ici+1
isi
ici
isi-1
carry
chain
IIIi
III
III si = isi + ici
si-1 si
Carry chain ripple limited to two digit positions!

19. Binary Addition Tables
Box I
Box II
Box III xi yi
tci
xi + yi
tci-1
ici+1
isi
ici si X 1 -1 2 -2
possible carry of 1
ti tell whether or not there is a POSSIBILITY of a carry of 1 (tci=0) or -1 (tci = 1)
It provides the “link” to avoid the carries in box III (“looks behind” one more digit position)
possible carry of -1
never both 1 or -1
from right neighbor

20. Carry Transfer Example1 1 1
xi-2
yi-2 1 -1 Ii I I 2 1
tci-2
IIi II
ici-1
For lecture
Note the carry chain of two digits 1
IIIi
III si
si-1

21. Binary Example X 0 0 0 X 1 1 1 X 0 0 0 X 1 1 1 1 -1 1 1 1 -1 1 -1 -11 -1 X Y TC IS IC S
X X
X X 1 -1 1 1 1 -1 1 -1 -1
For lecture

22. Possible Implementations
Carry chain ripple limited to two digit position!
I&II&III I II
III

23. Digit Serial Implementation
What if inputs are arriving digit-serially?
lsd first
msd first II
III si I xi yi
tci
xi +yi
isi
ici
latency of two xi yi I
xi +yi
tci
latency of zero
show conventional bit-serial add on the board first?
define on-line and on-line delay - latency of two in msd first reflects the carry across two digits
maybe give an animated example? II
ici
isi
III si

24. Key References
Avizienis, Signed-digit number representation for fast parallel arithmetic, IRE Trans. Electronic Computers, 10: , 1961.
Kornerup, Digit-set conversions, IEEE Trans. on Computers, 43(8): , 1994.
Metze, Robertson, Elimination of carry propagation in digital computers, Information Processing ‘59, pp , 1960.
Nagendra, Power, Delay and Area Tradeoffs in CMOS Arithmetic Modules, PhD Thesis, Penn State Univ., 1996.
Parhami, Generalized signed-digit number systems, IEEE Trans. on Computers, 39(1):89-98, 1990.
Parhami, Computer Arithmetic, Oxford Univ. Press, 1999.
Phatak, Koren, Hybrid signed-digit number systems, IEEE Trans. on Computers, 43(8): , 1994.