1. Dirac-Band Materials 2D Group-IV monolayers
Bi2Se3 3D-Topological Insulator
Carrier Transport- Ballistic and Acoustic Phonons
(Chapter 6)
Graphene
Heavier Group-IV
Devices -
Graphene electro-optic transistor
(Chapter 3)
Devices - Spin-Separator and Filter
(Chapter 4 and 5)
Carrier Transport- Contact Effects
(Chapter 7)
Device - Interconnects
(Chapter 8)
Carrier Transport- Defects
(Chapter 8)
Carrier Transport- Longitudinal & Vertical Transport
(Chapter 9)
Devices – Resonance Devices
(Chapter 9)

2. Decision-Making Process

3. Minimum required characteristics
Objective
Find beyond-CMOS Materials and Devices for High-Speed Low-Power Computing
Minimum required characteristics
(i) Good Gate Control
(ii) Large Mobility  Large Current  Faster Switching
(iii) Turn-Off Capability  Low –Leakage
Short-Channel Effect in CMOS  Poor Gate Control
Multi-Gate Devices 
+ Better gate Control
_ Complex Process + Strong Quantization
CMOS  Velocity Saturation
Dirac band Materials
Large Mobility
Long mean free path
High thermal conductivity
Graphene
2D Material
Can We Solve It ?
Chemical Modification ?
Confinement ?
 Poor Mobility [3]

4. Edge Effects & Transition Width
Chapter 3
Performance Evaluation of Electro-Optic Effect based Graphene Transistor
How to Switch-Off Graphene Transistor effectively (large ION/IOFF ratio) without strong confinement and chemical modification to open the band-gap ?
Can We Solve It ?
A new scheme to switch-off by creating “Virtual Band-Gap”  Allows us to relax “iii” constraint for now
(iv) Non-Volatile  Achieve Zero Standby Power  Controllable Spin-Based Properties
+ ION/IOFF > 104
+ SS < 60 mV/dec
_ ION ~ 0.1 mA/μm
(required > 1mA/μm)
Partially Achieved
Next Step of The Problem
Edge Effects & Transition Width
Considerable Leakage & Performance Degradation
CMOS  Volatile
Graphene ?
Is there better or similar Dirac-band material which can give good spin control + good mobility + good electrostatic control + turn-off (directly or via unconventional schemes)?
Weak SOC & Magnetic Doping 
+ Good for spin transport (e.g. spin interconnects)
_ Bad for our targeted type of Devices  poor spin control
Can We Solve It ?

5. Heavier Group-IV 2D Materials:
Tsai W F, Huang C Y, Chang T R, Lin H, Jeng H T and Bansil A 2013 Gated silicene as a tunable source of nearly 100% spin-polarized electrons Nat Commun
Theoretically predicted Good Bulk Spin Control in Y-shape Group-IV three-terminal devices
Heavier Group-IV 2D Materials:
+ Larger SOC than Graphene
+ Similar Dirac bands
++ Controllable Bands via E field
+ Silicene and Germanene could be CMOS process compatible
_ Slightly lower mobility than Graphene +
Better Possibility  Abandon Graphene line of thought
Partially Achieved
+ Good Spin-Separation on both edges
_ Only edge spin-transport  no bulk
_ Fano interference on edges  Poor conductance
_ E field may change materials’ phase : QSH to BI
Chapter 4
Y-Shape Spin-Separator for two-dimensional Group-IV
How seriously do these negatives affect carrier transport in heavier Group IV materials ?
Can they be circumvent ?
Can We Solve It ?

6. + Not Achieved + No Fano interference  Conductance Improved
_ Still only edge spin-transport  Bulk significantly degrades spin information (Spin-Filter device)
_ E field phase transition especially strong for Silicene & Germanene.
Can We Solve It ?
Chapter 5
Effect of Phase Transition on Quantum Transport in Group-IV Two-Dimensional U-shape Device
Process Issues in making heavier 2D Group-IV materials
Not Achieved
Bi2Se3 3D-Topological Insulator:
+ 2D Dirac surface states with spin-momentum locking
+ Time-Reversal Symmetry prohibits backscattering  Expected : robust transport & high-mobility
+ Bulk Band-gap ~ 0.3 eV  exploit large energy window for spin-polarized surface transport
Is there better material which has least ?
2D material like high velocity Dirac-bands
Instead of edge, spin-transport should be supported on entire surface to have large spin-polarized current
Large bulk-band gap to provide sufficiently large energy window to exploit Dirac surface states
Can 3D-TI furnish all 4 requirements?
Better Possibility  Abandon 2D Group-IV line of thought  Transition to 3D-TI +

7. Partially Achieved Is the 3D-TI really worth it ?
But why so many different resistance trends (w.r.t. temperature) and yet everybody claimed to be demonstrating topological surface dominated transport?
How strong is phonon scattering ?
From State of Art-Literature in :
Can 3D-TI furnish all 4 requirements?
Answer:
Could Be. Very Promising Material.
Note: Good electronic device needs Good transport characteristic
+ Provide explanation for all the resistance observations until then (> 2 yrs.)  Fundamental insights in 3D-TI transport
_ Phonon scattering could be strong BUT conclusion can only be drawn when information of Fermi-Level, bias, thickness and channel length is available.
 Inconclusive to accept or reject the material  Decision had to be based on application and design constraints.
Chapter 6
Carrier Transport in Bi2Se3 Topological Insulator Slab
Partially Achieved
What about contacts and spin-flow ?
1. Device is not just channel in isolation. How do contacts affect transport ?
2. How good is TI for carrying and controlling spin-information?
(spin injected via FM contacts)
Chapter 7
Contact Effects in thin 3D-Topological Insulators: How does the current flow ?

8. + Provide explanation for another experimental data (FM contacts)
+ Show current redistributes to flow on topological surfaces
+ Contacts very important  may result in seemingly unanticipated results
_ Poor spin-info at high-temperature  Pristine Bi2Se3 3D-TI not appropriate for spintronics. BUT:
How about magnetic doping  Hotly researched track of TI  Too broad with too many possibilities  Outside the purview of this thesis
Chapter 7
Contact Effects in thin 3D-Topological Insulators: How does the current flow ?
Seems “fine” for charge transport so far, how about suspected devices ?
Partially Achieved
Interconnects to replace Cu ?
(based on ITRS 2011 roadmap)
Band-Alignment modulation based resonant devices ?
(based on IEEE TED, 60 (2013) )
Chapter 8
Evaluation of mobility in thin Bi2Se3 Topological Insulator for prospects of
Local Electrical Interconnects
Chapter 9
Effect of Band-Alignment Operation on Carrier Transport in Bi2Se3
Topological Insulator

9. Partially Achieved Partially Achieved + High mobility @ Low Temp.
_ Poor High Temp.
_ Low DOS near Dirac-point (Topological Surface States)
 At least thin Bi2Se3 3D-TI seemingly not good for interconnects.
? Scope still for even larger bulk band-gap material with weak phonon scattering at room temperature
Chapter 8
Evaluation of mobility in thin Bi2Se3 Topological Insulator for prospects of
Local Electrical Interconnects
Partially Achieved
Conclusion
1. 2D Group-IV material do not seem very promising for our problem
2. 3D-TI  Inconclusive (still May or May Not)
3. Need 3D-TI with weak electron-phonon coupling and large bulk band-gap.
Note: For such material defects may become important (Defects cannot back-scatter but still scatter)
4. Bi2Se3 may not be suitable for our problem.
Deeper into carrier transport in 3D-TI:
* Effect of Defects, Vacancies
* Real-Space Transport on GP-GPU
* Mode-matching & Simultaneous transport in longitudinal and vertical direction
Partially Achieved
+ Band-Alignment modulation  Resonant devices
_ ION/IOFF very weak (lateral transport)
_ Vertical transport  assumptions in IEEE TED 2013 invalidated  even weaker resonance to total elimination
? Lateral transport based design could be improved with the unconventional switching scheme investigated in Chapter 3
Chapter 9
Effect of Band-Alignment Operation on Carrier Transport in Bi2Se3
Topological Insulator