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HADES goes SIS-100* SIS-18 DAQ upgrade possibilities

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Presentation on theme: "HADES goes SIS-100* SIS-18 DAQ upgrade possibilities"— Presentation transcript:

1 HADES goes SIS-100* SIS-18 DAQ upgrade possibilities
Jan Michel - Goethe Universität Frankfurt HADES goes SIS-100* SIS-18 DAQ upgrade possibilities * not yet...

2 Jan Michel - Goethe Universität Frankfurt
HADES DAQ upgrades Why another upgrade? How to do it? How much do we gain? Who will work on it? Jan Michel - Goethe Universität Frankfurt

3 Jan Michel - Goethe Universität Frankfurt
Current Limits Slowest systems are Shower, fixed read-out time of 11 us MDC, 400 ns read-out time per hit, 5.5 us latency on link Current maximum (for small events) ~ 66 kHz with all systems AuAu, 10kHz Jan Michel - Goethe Universität Frankfurt

4 Jan Michel - Goethe Universität Frankfurt
MDC front-ends Slow data transport on MBO Shaky connectors Strongly fluctuating power consumption Analog part quite good but some more modern solutions to be investigated Jan Michel - Goethe Universität Frankfurt

5 Jan Michel - Goethe Universität Frankfurt
MDC: Digital Part Replace both TDC and OEP with FPGA-board data transport / control: proven on OEP time measurement in FPGA: proven in many experiments The bad news: Cahit's TDC are just too good resolution not worse than 50ps only 500ps needed for MDC Jan Michel - Goethe Universität Frankfurt

6 Jan Michel - Goethe Universität Frankfurt
Low-cost FPGA TDC Sampling with phase shifted clocks e.g. 400 MHz sampling with rising/falling edge 4 clocks shifted by 90° → 312 ps binning many channels! Jan Michel - Goethe Universität Frankfurt

7 Jan Michel - Goethe Universität Frankfurt
MDC FEE Upgrade Replacing digital part / TDC : “trivial” Replacing analog part: challenging PCB design: no critical points Reducing read-out time substantially Not reducing trigger-release latency! maybe upgrade to faster serial links? AuAu, 10kHz Jan Michel - Goethe Universität Frankfurt

8 Jan Michel - Goethe Universität Frankfurt
Trigger Releases Trigger – Busy release architecture not suited for high rates rather long latency on optical links for transport CBM, PANDA etc: Free running read-out Jan Michel - Goethe Universität Frankfurt

9 Jan Michel - Goethe Universität Frankfurt
“Tagged” Read-out Reference Time sent for each event CTS assumes deadtime and free buffer sizes trigger information / busy release only every N events Handshake needed for buffer handling Jan Michel - Goethe Universität Frankfurt

10 Tagged Read-out: Deadtime?
add 5us (MDC), 3us (other systems) for busy release add 400 ns for reference time 4us assumed dead time seems reasonable max. 250 kHz trigger rate Jan Michel - Goethe Universität Frankfurt

11 Tagged Read-out – Reasonable?
We can gain a factor 2.5 in event rate Only for light heavy-ions due to detector load Much work – all trigger handling has to be rewritten Code on TRB2 & RICH not touched since four years - experts “vanished” Jan Michel - Goethe Universität Frankfurt

12 Jan Michel - Goethe Universität Frankfurt
Not only in HADES TrbNet also to be used for CBM (here: RICH) Jan Michel - Goethe Universität Frankfurt

13 Jan Michel - Goethe Universität Frankfurt
TrbNet for CBM Several improvements to existing TrbNet planned for CBM/Panda Jan Michel - Goethe Universität Frankfurt

14 Jan Michel - Goethe Universität Frankfurt
Summary Upgrade of MDC FEE should be done for data quality and read-out speed gain 30% in max event rate New read-out scheme gain factor 2.5 huge cost in man-power With new RICH read-out limits from load on detector might get less strict Jan Michel - Goethe Universität Frankfurt


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