1. Cell Broadband Engine Programming Workshop Welcome Session
Cell Programming Workshop
Cell/Quasar Ecosystem & Solutions Enablement
Cell Programming Workshop
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2. Workshop Objectives At the end of this workshop you should know
The Cell Broadband Engine™ (Cell BE) system organization, software development environment, software development toolkit, software model, and software development techniques.
How to write programs using various techniques to harvest the performance of the Cell BE.
Trademarks - Cell Broadband Engine and Cell Broadband Engine Architecture are trademarks of Sony Computer Entertainment, Inc.
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3. Agenda
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4. So let’s get started!
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5. SDK1.0 SDK1.0.1 SDK1.1 SDK1.1.1 SDK 2.0 Delivered – 7/14/2006 11/2005
2/2006
7/2006
9/2006
12/2006
SDK1.0
SDK1.0.1
SDK1.1
SDK1.1.1
SDK 2.0
Delivered – 7/14/2006
XL C/C++
v8.1 Linux/x86, LoP
Overlay prototype
Auto-SIMD enhancements
Linux Kernel updates
Performance Enhancements
RAS/ Debug support
SPE runtime extensions
Interrupt controller cleanup
GNU Toolchain updates
FSF integration
GDB multi-thread support
Newlib library optimization
Prog model support for overlay
Programming Model Preview
Overlay support
Accelerated Libraries Framework
Library enhancements
Vector Math Library – Phase 1
MASS Library for SPU, MASSV Library for PPU/SPU
IDE
Tool integration
Remote tool support
Performance Analysis
Visualization tools
Bandwidth, Latency, Lock analyzers
Performance debug tools
Mambo
Performance model correlation
Visualization
Security (Concept validation)
Alpha Quality
SDK hosted on FC4 / X86
OS: Initial Linux Cell patches
SPE Threads runtime
XLC Cell C Compiler
SPE gdb debugger
Cell Coding Sample Source
Documentation
Installation Scripts
Cell Hardware Specs
Programming Docs
Alpha Quality
SDK hosted on FC5 / X86
Critical Linux Cell Performance Enhancements
STIDC reqd. features
Critical Cell RAS Functions
Machine Check, System Error
Performance Analysis Tools
Oprofile and Event Trace
GNU Toolchain updates
Mambo Updates
Julia Set Sample
GCC Tools from SCEA
gcc 4.02 for Cell
Binutils for Cell
GCC Tools from SCEA
gcc 3.0 for Cell
Binutils for Cell
Refresh
Refresh
Execution platform:
Cell Simulator
Cell Blade 1 rev 3
Hosting platform:
Linux/86 (FC5)
Linux/Cell (FC5)*
Linux/Power (FC5)*
Documentation
Mambo updates for CB1 and 64-bit hosting
ISO image update
Execution platform:
Cell Simulator
Cell Blade 1 rev 2
Hosting platform:
Linux/86 (FC4)
Linux/Cell (FC4)*
Linux/Power (FC4)*
Execution platform:
Cell Simulator
Hosting platform:
Linux/86 (FC4)
Execution platform:
Cell Simulator
Cell Blade 1 rev 3
Hosting platform:
Linux/86 (FC5)
Linux/Cell (FC5)*
Linux/Power (FC5)*
Cell Programming Workshop
* Subset of tools
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6. Cell based systems Software Stack
In addition: libraries, programming model and frameworks, performance tools, operating systemsf rom IBM Ecosystem, Mercury, Sony, PeakStream, RapidMind, Yellow Dog
Applications
ISV, Universities, Labs, etc
Sector Specific Libraries
ISVs, Universities, Labs, Open Source, etc.
Scale out Systems
Market Segment Specific
Overlay support, Accelerated Library Framework (ALF)
Performance tooling (oprofile, pmcount, VPA)
Gdbserver server support for combined PPE/SPE remote debugging
IDE integration with programming models, compiler, debugger and simulator support,
Ubiquitous for all Markets
Application Tooling and Environment
Programming model/APIs for accelerators
Compilers
C, C++, Fortran, etc
XLC GA with additional distro hosted platform coverage, Overlay support,
gcc and xlC continued work on auto-vectorization/SIMDization,
xlC MASS/V support
Core Libraries
e.g. SPE intrinsic, etc
libSPE cleanup and vector math support for SPEs
security utilities
Operating Systems such as Linux
e.g. SPE exploitation, BE awareness
SPE performance enhancements, improved scheduling and affinity management,
SPE core files
Device Drivers
Firmware
e.g. Blades, Development platforms, etc
HyperVisors
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7. Cell Broadband Engine Architecture™ Technology Competitive Roadmap
2006
2007
2008
2009
2010
1TF Processor 45nm SOI
Performance
Enhancements/ Scaling
Enhanced Cell BE (1+8eDP) 65nm SOI
Cell BE (1+8) 90nm SOI
Cost Reduction
All future dates are estimations only; Subject to change without notice.
Cell Programming Workshop
Cell BE Roadmap Version Jul-2006
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8. Enhanced Cell BE-based Blade Advanced Cell BE-Based Blade
Cell Broadband Engine™ Blade – The first in a line of planned offerings using Cell Broadband Engine technology
Performance
Target Availability: 1H08
Enhanced Cell BE-based Blade
2 Enhanced Cell BE Processors
SP & DP Floating Point Affinity
Up to 16 GB Memory
Up to 16X PCI Express
Target Availability: 2H07
Advanced Cell BE-Based Blade
GA: 2H06
2 Cell BE Processors
Single Precision Floating Pt Affinity
2 GB Memory
Up to 16X PCI Express
Cell BE-Based Blade
SDK 3.0
2 Cell BE Processors
Single Precision Floating Pt Affinity
1 GB Memory
Up to 4X PCI Express™
SDK 2.0
Target Availability: 2H07
SDK 1.1
Hardware
Target Availability: 1H07
Alpha Software
Beta Software
Available: 17 July 2006
GA Software
2006
2007
2008
All future dates are estimations only; Subject to change without notice.
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Cell BE Roadmap Version Jul-2006
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9. VMware
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10. Perform Cell VMware image installation
Fedora Core 5 + Cell SDK Hands-on Exercise + IDE
Assume your system is running under WinXP, has 10MB of free disk space, and at least 512MB of RAM
Copy all files to a windows directory, e.g., cellvm
CellVMware-FC5-SDK20-IDE-28Jan07.zip
VMware-player exe (for Windows)
VMware-player tar.gz (for Linux)
Unzip CellVMware-FC5-SDK20-IDE-28Jan07.zip
Install VMware-player exe
Adjust the memory size allocated for the vmware image specified in the file Other Linux 2.6.x kernel.vmx
memsize = “xxxx” where xxxx equals half of your physical RAM
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11. Check for correct system installation
Start the VMware Player
Select “Other Linux 2.6.x kernel.vmx” as the virtual machine configuration file
For the first time run, answer all questions using the default selected options
Wait for the complete boot of the guest FC5, then login
Userid: root
Password: inn0vate
Open a terminal session and do cat /proc/version
“linux version 2.6.1x-x.xxxx_FC5 ………..”
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12. Check for correct system components
We should have the following directories
/opt/ibm/cell-sdk (Cell BE SDK 2.0)
/opt/ibm/systemsim-cell (Cell BE full system simulator)
/opt/cell (GNU toolchain-3.3)
/opt/ibmcmp (IBM xlc and xlcpp)
/opt/IDE (Cell BE Integrated Development Environment)
/opt/cell_class (workshop hands-on examples)
/opt/sandbox (sandbox for system simulator)
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13. Changing the default compiler
The build environment makefile is
/opt/ibm/cell-sdk/prototype/README_build_env.txt
gcc is the default compiler
To change gcc to xlc, run ./cellsdk build [-x | -g ] where the –x flag selects the XL C/C++ compiler (x86 only) and the –g flag selects the gcc compiler
Notes: You should cd /opt/ibm/cell-sdk/prototype/src and then run ./cellsdk build
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14. Check for correct environment variables
“top of the SDK” is /opt/ibm/cell-sdk/prototype
Makefile in SDK samples and tutorial use
“include ../../../../../make.footer”
CELL_TOP, TOP, and SDK_TOP are used in many exercises
export CELL_TOP=/opt/ibm/cell-sdk/prototype
export TOP =/opt/ibm/cell-sdk/prototype
export SDK_TOP =/opt/ibm/cell-sdk/prototype
NOTES: you can include those exports in /root/.bash_profile
If make fails,
make sure to have correct path and environment variables, or
logout root then log back in, or
reboot the host FC5 by typing “shutdown –r now”
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15. Check for IDE Operational
cd /opt/IDE/eclipse
./eclipse
Note: eclipse should come up after ./eclipse was typed. The eclipse windows is NOT in foreground, therefore you may not see it. To see it, you click on the screen to bring the background to foreground.
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16. Summary Make sure to have a fully cell operational environment
FC5 as host
Cell SDK 2.0
system simulator systemsim-cell
Cell IDE
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17. Where to get Cell BE information?
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18. Cell Resource Cell resource center at developerWorks
Cell developer's corner at power.org
The cell project at IBM Research
The Cell BE at IBM alphaWorks
Cell BE at IBM Engineering & Technical Services
IBM Power Architecture
Cell BE documentation at IBM Microelectronics
Linux info at the Barcelona Supercomputing Center website
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19. Cell Education Online courses at IBM Education Assistant
Online courses at IBM Learning
Podcasts at power.org
Onsite classes at IBM Innovation Center
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20. Cell BE Documentation
The following documents define the Cell Broadband Engine architecture, programming using the SDK, the new IBM BladeCenter QS20, XL C/C++compiler, Full-System Simulator, and the PowerPC base architecture.
Cell Broadband Engine
Cell Broadband Engine Architecture V1.01 (updated)
Cell Broadband Engine Programming Handbook V1.0
Cell Broadband Engine Registers V1.4 (updated)
SPU C/C++ Language Extensions V2.2.1 (updated)
Synergistic Processor Unit (SPU) Instruction Set Architecture V1.11 (updated)
SPU Application Binary Interface Specification V1.5.1 (updated)
SPU Assembly Language Specification V1.4 (updated)
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21. Cell BE Documentation Cell Broadband Engine Programming using the SDK
Cell Broadband Engine SDK Installation Guide V2.0 (updated)
Cell Broadband Engine SDK Programmer's Guide V1.0 (new)
Cell Broadband Engine Programming Tutorial V2.0 (updated)
Cell Broadband Engine Linux Reference Implementation Application Binary Interface Specification V1.1 (updated)
SPE Runtime Management library documentation V1.2 (updated)
SPE Runtime Management library documentation V2.0 (new)
Cell Broadband Engine SIMD Math Library Specification V1.0 (new)
Accelerator Library Framework Programming Guide and API Reference V1.0 (new)
Sample Library documentation V2.0 (updated)
IDL Compiler for Remote Procedure Calls
Post-link Optimization Utility (new)
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22. Cell BE Documentation IBM BladeCenter QS20
IBM BladeCenter QS20 Datasheet
IBM BladeCenter QS20 Installation and User's Guide
IBM BladeCenter QS20 Problem Determination and Service Guide
IBM XL C/C++ Compiler
Getting Started with IBM XL C/C++ Compiler (new)
IBM XL C/C++ Compiler Language Reference (new)
IBM XL C/C++ Compiler Programming Guide (new)
IBM XL C/C++ Compiler Reference (new)
IBM XL C/C++ Compiler Installation Guide (new)
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23. Cell BE Documentation IBM Cell Broadband Engine Full-System Simulator
IBM Full-System Simulator Users Guide (updated)
IBM Full-System Simulator Command Reference (updated)
Performance Analysis with the IBM Full-System Simulator
IBM Full-System Simulator BogusNet HowTo (updated)
PowerPC Base
PowerPC Architecture Book, Version 2.02
Book I: PowerPC User Instruction Set Architecture
Book II: PowerPC Virtual Environment Architecture
Book III: PowerPC Operating Environment Architecture
PowerPC Microprocessor Family
Vector/SIMD Multimedia Extension Technology Programming Environments Manual Version 2.06c
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24. Cell BE Technical Articles
Real-time Ray Tracing
Papers from the Fall Processor Forum 2005: Unleashing the Cell Broadband Engine Processor: The Element Interconnect Bus
Papers from the Fall Processor Forum 2005: Unleashing the power of the Cell Broadband Engine: A programming model approach
Cell Broadband Engine Architecture and its first implementation
Introduction to the Cell Broadband Engine
Introduction to the Cell Multiprocessor
Maximizing the power of the Cell Broadband Engine processor: 25 tips to optimal application performance
Terrain Rendering Engine (TRE): Cell Broadband Engine Optimized Real-time Ray-caster
An Implementation of the Feldkamp Algorithm for Medical Imaging on Cell Broadband Engine
Cell Broadband Engine Support for Privacy, Security, and Digital Rights Management Applications
A Programming Example: Large FFT on the Cell Broadband Engine
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25. More Detailed Description
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26. Standards and Documentation at developerWorks http://www-128. ibm
Cell Broadband Engine Programming Handbook Get information for developing applications, libraries, middleware, drivers, compilers, or operating systems for the Cell Broadband Engine processor.
Cell Broadband Engine Hardware Initialization Guide This document describes the sequences for initializing a Cell Broadband Engine processor, from Power-On Reset (POR) through calibration of the memory and I/O interfaces and the PowerPC Processor Element (PPE) firmware.
Cell Broadband Engine Linux Reference Implementation Application Binary Interface Specification This document defines a standard interface that allows compiled objects to be linked and run on the Linux Reference Implementation for the Cell Broadband Engine without recompilation or recoding.
Cell Broadband Engine Registers This document describes the CBE memory-mapped I/O registers used by the PowerPC Processor Element (PPE), the Synergistic Processor Elements (SPEs) and other units.
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27. Standards and Documentation at developerWorks http://www-128. ibm
Cell Broadband Engine Architecture V1.0 Like the Power Architecture, but different -- the CBE Architecture builds upon knowledge contained in the Power Architecture "books" and describes the app-level User Mode Environment (UME) and the OS-level Privileged Mode Environment (PME) in astonishingly rich detail.
Synergistic Processor Unit (SPU) Instruction Set Architecture V1.0 Somewhere between a general-purpose processor and special-purpose hardware lies the Cell SPU: designed to provide leadership performance in game, media, and broadband applications, this document describes the Instruction Set of the Synergistic Processor Unit (SPU). Get to know all of its instructions.
SPU Application Binary Interface Specification V1.4 Including register usage and calling conventions, data type sizes and alignment, low-level system and language binding information, information on loading and linking, and coding examples, this specification defines the system interface for SPU-targeted object files to help ensure maximum binary portability across implementations.
SPU Assembly Language Specification V1.3 Program directly to the SPU Instruction Set! This specification will prove an indispensable aid in your efforts as it takes you on a carefully-worded journey describing SPU assembly-level syntax and machine-dependent features for the GNU assembler (but serves as an example specification for other SPU assemblers as well).
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28. Standards and Documentation at developerWorks http://www-128. ibm
SPU C/C++ Language Extensions V2.1 Unleash the full processing power of the SPUs. This specification extends the C and C++ languages with a rich set of vector data types, several programmer directives, and an extensive set of vector intrinsics.
PowerPC Architecture Book, Version 2.01 This three-volume set (pdf), Version 2.01, defines the instruction and registers used by application programs, the storage models, privileged facilities, and related instructions for the POWER4 and POWER4+ processors.
PowerPC Architecture Book, Version 2.02 This three-volume set (pdf), Version 2.02, defines the instruction and registers used by application programs, the storage models, privileged facilities, and related instructions for the IBM POWER5 processor family.
PowerPC Microprocessor Family: Vector/SIMD Multimedia Extension Technology Programming Environments Manual Version 2.06c Create software that is compatible across the family of 64-bit PowerPC processors, which have implemented the Vector/SIMD Multimedia Extension technology -- from the 970FX, to the Cell Broadband Engine -- and beyond.
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29. IBM Full-System Simulator – XLC – Software Sample at alphaworks
IBM Full-System Simulator for the Cell Broadband Engine Processor
A full-system simulation infrastructure and tools for the Cell Broadband Engine processor.
XL C Alpha Edition for Cell Broadband Engine Processor
A high performance C compiler for the IBM Cell Broadband Engine processor.
IBM Cell Broadband Engine Software Sample and Library Source Code
Working examples and libraries that demonstrate programming techniques and performance of Cell Broadband Engine Architecture.
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30. Linux on Cell at the Barcelona Supercomputer Center http://www. bsc
Cell Broadband Engine SDK for x86, PowerPC, and Cell-based blade installation script and open source packages
The cross-hosted Cell Broadband Engine development environment contains packages from several sources. This page includes a primary install/build script for the Cell Broadband Engine SDK, an SPU/PPU toolchain package, a Fedora Core 5 for PowerPC run-time package for the GNU/Linux on Cell simulation environment, Cell BE kernel patches for the Linux Kernel, and the source code for the SPE run-time management library.
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31. Linux on Cell at the Barcelona Supercomputer Center http://www. bsc
GCC Toolchain
Contains the GCC compiler for the SPE implemented by SCE which also supports the standards defined in the SPU C/C++ Language Extensions V2.1, SPU Application Binary Interface Specification V1.4, and Synergistic Processor Unit (SPU) Instruction Set Architecture V1.0 documents (previously released). The associated assembler and linker additionally support the SPU Assembly Language Specification V1.3. The assembler and linker are common to both the GCC and XL C compilers.
Linux Kernel Patch
This set of patches to the Linux operating system provides services needed to support the hardware facilities of the Cell Broadband Engine microprocessor.
Fedora Core 5 links
SPE Management Library
Contains an SPE thread programming model for CBEA applications.
SDK Installation Script
The install script grabs the RPMs and builds the CBE programming environment
Linux on Cell
Provides information about how to enable Linux on CBE platforms.
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32. Special Notices -- Trademarks
This document was developed for IBM offerings in the United States as of the date of publication. IBM may not make these offerings available in other countries, and the information is subject to change without notice. Consult your local IBM business contact for information on the IBM offerings available in your area. In no event will IBM be liable for damages arising directly or indirectly from any use of the information contained in this document.
Information in this document concerning non-IBM products was obtained from the suppliers of these products or other public sources. Questions on the capabilities of non-IBM products should be addressed to the suppliers of those products.
IBM may have patents or pending patent applications covering subject matter in this document. The furnishing of this document does not give you any license to these patents. Send license inquires, in writing, to IBM Director of Licensing, IBM Corporation, New Castle Drive, Armonk, NY USA.
All statements regarding IBM future direction and intent are subject to change or withdrawal without notice, and represent goals and objectives only.
The information contained in this document has not been submitted to any formal IBM test and is provided "AS IS" with no warranties or guarantees either expressed or implied.
All examples cited or described in this document are presented as illustrations of the manner in which some IBM products can be used and the results that may be achieved. Actual environmental costs and performance characteristics will vary depending on individual client configurations and conditions.
IBM Global Financing offerings are provided through IBM Credit Corporation in the United States and other IBM subsidiaries and divisions worldwide to qualified commercial and government clients. Rates are based on a client's credit rating, financing terms, offering type, equipment type and options, and may vary by country. Other restrictions may apply. Rates and offerings are subject to change, extension or withdrawal without notice.
IBM is not responsible for printing errors in this document that result in pricing or information inaccuracies.
All prices shown are IBM's United States suggested list prices and are subject to change without notice; reseller prices may vary.
IBM hardware products are manufactured from new parts, or new and serviceable used parts. Regardless, our warranty terms apply.
Many of the features described in this document are operating system dependent and may not be available on Linux. For more information, please check:
Any performance data contained in this document was determined in a controlled environment. Actual results may vary significantly and are dependent on many factors including system hardware configuration and software design and configuration. Some measurements quoted in this document may have been made on development-level systems. There is no guarantee these measurements will be the same on generally-available systems. Some measurements quoted in this document may have been estimated through extrapolation. Users of this document should verify the applicable data for their specific environment.
Revised January 19, 2006
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33. Special Notices (Cont.) -- Trademarks
The following terms are trademarks of International Business Machines Corporation in the United States and/or other countries: alphaWorks, BladeCenter, Blue Gene, ClusterProven, developerWorks, e business(logo), e(logo)business, e(logo)server, IBM, IBM(logo), ibm.com, IBM Business Partner (logo), IntelliStation, MediaStreamer, Micro Channel, NUMA-Q, PartnerWorld, PowerPC, PowerPC(logo), pSeries, TotalStorage, xSeries; Advanced Micro-Partitioning, eServer, Micro-Partitioning, NUMACenter, On Demand Business logo, OpenPower, POWER, Power Architecture, Power Everywhere, Power Family, Power PC, PowerPC Architecture, POWER5, POWER5+, POWER6, POWER6+, Redbooks, System p, System p5, System Storage, VideoCharger, Virtualization Engine.
A full list of U.S. trademarks owned by IBM may be found at:
Cell Broadband Engine and Cell Broadband Engine Architecture are trademarks of Sony Computer Entertainment, Inc. in the United States, other countries, or both.
Rambus is a registered trademark of Rambus, Inc.
XDR and FlexIO are trademarks of Rambus, Inc.
UNIX is a registered trademark in the United States, other countries or both.
Linux is a trademark of Linus Torvalds in the United States, other countries or both.
Fedora is a trademark of Redhat, Inc.
Microsoft, Windows, Windows NT and the Windows logo are trademarks of Microsoft Corporation in the United States, other countries or both.
Intel, Intel Xeon, Itanium and Pentium are trademarks or registered trademarks of Intel Corporation in the United States and/or other countries.
AMD Opteron is a trademark of Advanced Micro Devices, Inc.
Java and all Java-based trademarks and logos are trademarks of Sun Microsystems, Inc. in the United States and/or other countries.
TPC-C and TPC-H are trademarks of the Transaction Performance Processing Council (TPPC).
SPECint, SPECfp, SPECjbb, SPECweb, SPECjAppServer, SPEC OMP, SPECviewperf, SPECapc, SPEChpc, SPECjvm, SPECmail, SPECimap and SPECsfs are trademarks of the Standard Performance Evaluation Corp (SPEC).
AltiVec is a trademark of Freescale Semiconductor, Inc.
PCI-X and PCI Express are registered trademarks of PCI SIG.
InfiniBand™ is a trademark the InfiniBand® Trade Association
Other company, product and service names may be trademarks or service marks of others.
Revised July 23, 2006
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34. Special Notices - Copyrights
(c) Copyright International Business Machines Corporation 2005.
All Rights Reserved. Printed in the United Sates September 2005.
The following are trademarks of International Business Machines Corporation in the United States, or other countries, or both.
IBM IBM Logo Power Architecture
Other company, product and service names may be trademarks or service marks of others.
All information contained in this document is subject to change without notice. The products described in this document are NOT intended for use in applications such as implantation, life support, or other hazardous uses where malfunction could result in death, bodily injury, or catastrophic property damage. The information contained in this document does not affect or change IBM product specifications or warranties. Nothing in this document shall operate as an express or implied license or indemnity under the intellectual property rights of IBM or third parties. All information contained in this document was obtained in specific environments, and is presented as an illustration. The results obtained in other operating environments may vary.
While the information contained herein is believed to be accurate, such information is preliminary, and should not be relied upon for accuracy or completeness, and no representations or warranties of accuracy or completeness are made.
THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED ON AN "AS IS" BASIS. In no event will IBM be liable for damages arising directly or indirectly from any use of the information contained in this document.
IBM Microelectronics Division The IBM home page is
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Hopewell Junction, NY
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