1. Basic Adders and Counters
ECE 645: Lecture 3
Basic Adders and Counters

2. Required Reading Behrooz Parhami,
Computer Arithmetic: Algorithms and Hardware Design
Chapter 5, Basic Addition and Counting,
Sections , pp

3. Half-adder c x HA s y x y c s 1 1 1 1
2 1
x + y = ( c s )2

4. Alternative implementations (1)
Half-adder
Alternative implementations (1) a)
c = xy
s = x  y b)
s = xy + xy
c = x + y

5. Alternative implementations (2)
Half-adder
Alternative implementations (2) c)
c = xy
s = xc + yc = xc  yc

6. Full-adder x cout FA y s cin x + y + cin = ( cout s )2 x y cin cout s1 1 1 1 1
x + y + cin = ( cout s )2

7. Alternative implementations (1)
Full-adder
Alternative implementations (1) a)
s = (x  y)  cin
cout = xy + cin (x  y) s c

8. Alternative implementations (2)
Full-adder
Alternative implementations (2) b)
s = x  y  cin = xycin + xycin + xycin + xycin
cout = xy + xcin + ycin

9. Alternative implementations (3)
Full-adder
Alternative implementations (3) c) x y
cout s 1 1 1
cin
cin
cin
cin
cin
cin

10. Alternative implementations (4)
Full-adder
Alternative implementations (4)
Implementation used to generate fast carry logic
in Xilinx FPGAs x y A2 A1
XOR D 1
Cin
Cout S p g x y
cout 1
cin
p = x  y
g = y
s= p  cin = x  y  cin

14. Latency of a k-bit ripple-carry adder
Tripple-add = TFA(x,ycout) +
+ (k-2)  TFA(cincout) +
TFA(cin s)
Latency  k  TFA
Latency  k

17. Overflow for signed numbers (1)
Indication of overflow
Positive
+ Positive
= Negative
Negative
+ Negative
= Positive
Formulas
Overflow2’s complement = xk-1 yk-1 sk-1 + xk-1 yk-1 sk-1 =
= ck  ck-1

18. Overflow for signed numbers (2)
xk-1 yk-1 ck-1 ck sk-1 overflow ckck-1 1 1 1 1 1 1 1

20. xi yi
Bit-serial
adder c0
ci+1
start
clk si

21. xi yi d d
Digit-serial adder c0
ci+1
start
clk d si

22. Addition of a constant (1)
xk-1 xk x1 x0
yk-1 yk y1 y0
variable +
constant
sk-1 sk s1 s0
xk-1 xk xh+1 xh xh x0
yk-1 yk yh
variable +
constant
sk-1 sk sh+1
xh xh x0

23. Addition of a constant (2)
. . .
xk-1
xk-2
xh+2
xh+1 xh
xh-1 x0
. . . ck
. .
. . .
HA/
MHA
HA/
MHA
HA/
MHA
HA/
MHA
sk-1
sk-2
. . .
sh+2
sh+1 xh
xh-1
. . . x0 If
yi = Half-adder (HA)
yi = Modified half-adder (MHA)

24. Modified half-adder c x MHA s y x y c s 1 1 1 1 x + y + 1 = ( c s )21 1 1 1
2 1
x + y + 1 = ( c s )2

25. Incrementer xk-1 xk-2 x2 x1 x0 . . . ck . . sk-1 sk-2 . . . s2 s1 x0HA HA HA HA
sk-1
sk-2
. . . s2 s1 x0
Decrementer
xk-1
xk-2 x2 x1 x0
. . . ck
. .
MHA
MHA
MHA
MHA
sk-1
sk-2
. . . s2 s1 x0

28. Possible solutions to the carry propagate problem
1. Detect the end of propagation rather than wait for
the worst-case time
2. Speed-up propagation via
look-ahead
carry skip
carry select, etc
3. Limit carry propagation to within a small number of bits
4. Eliminate carry propagation through the redundant
number representation

30. Analysis of carry propagation
Probability of carry generation = (xiyi = 11)
Probability of carry propagation = (xiyi = 01 or 10)
Probability of carry anihilation = (xiyi = 00 or 11)
j j i+1 i
1 0 … 1 …0 … 1 1
1 1 … 0 …1 … 0 1
11 or 00
01 or 10
Probability of
carry propagating
from position
i to position j =  =
probability of
propagation
probability of
anihilation

31. Expected length of the carry chain that starts at position i (1)
Expected length(i, k) =
Length
of the
carry chain
Probability
of the given
length
Distance
till the end
of adder
Probability
of propagation
till the end of
adder

32. Expected length of the carry chain that starts at position i (2)
Expected length(i, k) =
For i << k
Expected length of the carry propagation is  2