1. VDD M3 M1
Vbb
Vin CL Rb Vo
VDD Vo
Vb3
Both share the same small signal model.
gm2 may include gs2,
rds1 may include rp-source
Cs2 include all caps at S2

2. vg1/vin =1/(1+sRsaCgs1)
KCL at Vo:
KCL at Vs2:

3. ro  rds1*Av2 || RL
Av(0)  - gm1ro
p1 = - w-3dB = -1/roCout
GBW = gm1/Cout
z1 = +gm1/Cgd1
p2  -1/{(rds1|| rincg)Cs2}
p3  -1/RsaCgs1

4. Veff1 + |Veff2| = VDD – OSR For VDD = 5, OSR>=4,
Vomin = Veff1
Vomax = VDD – |Veff2|
Output swing range:
VDD – Veff1 – |Veff2|
Veff1 + |Veff2| = VDD – OSR
For VDD = 5, OSR>=4,
 Veff1 + |Veff2| <= 1 M2 vo
10m CL M1
Vin
For transistor in signal path, small Veff -> large gm
For current mirror transistors, large Veff -> robust
So take: Veff1 ~ 0.3, |Veff2| ~0.7

5. Positive slew rate SR+ = I2Q/CLtot
Negative slew rate SR- = (I1max-I2Q)/CLtot
I1max can be very large when Vin is very large.
So, SR- is unknown but is not the limit.
From SR+, I2Q = SR+ * CLtot
To accommodate parasitics: I2Q = SR+ * 1.2CLtot
40*1.2*5=240m
Current mirror ratio: 1:24
For M2: ID2 = K’ (W/L) (Veff2)^2
-240 = -20 (W/L) 0.7^2
 W/L  24.
The diode connection: W/L = 1.
For both transistors, use larger L, e.g. L=2Lmin.

6. GBW = gm1 / CLtot
gm1 = GBW * CLtot = GBW * 1.2CL
=40*2*10^6*1.2*5*10^-12 
gm1^2 = K’ (W/L) 4*I1Q = K’ (W/L) 4*I2Q
W/L = ^2/(60e-6*4*240e-6)
 39
For input transistor, use L = 1.5*Lmin = 0.9
W=39*0.9  35
Can use W/L = (6m/0.9m) x 6
Check Veff: {240/(60)/(36/0.9)}^0.5=0.1^0.5, OK

7. So Vin has to be very accurately selected to have the right Q-point.
VDD
VDD
Since the amplifier is supposed to have high gain from Vin to Vo, a small error in Vin can cause large change in Vo, thus pushing Vo to be either very high (M2 in triode) or very low (M1 in triode).
So Vin has to be very accurately selected to have the right Q-point.
Two ways for this: M2 10 vo CL
VoQ
– + M1
VinQ

8. Use a high gain in VCVS, eg, 10^4.
VDD
VDD
You can either do a fine step sweep near the computed VinQ = Veff+Vt, to find the right VinQ that make VoQ near middle of OSR;
Or use the VCVS feedback on the previous page to automatically generate VinQ.
Use a high gain in VCVS, eg, 10^4.
After generation, replace by the connection on this page. M2 vo 10 CL M1 ~
VinQ
With this, do DC, AC, and transient analysis.

10. VDD
VDD
VDD M2 M2 10
vo-
vo+ CL CL M1 M1
VoQ
Voc
vin+
vin-
– +
2*M1