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Published byErlin Yulia Tanuwidjaja Modified over 6 years ago
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GlueX Flash ADCs 3425 PMT channels Forward, Barrel Calorimeters
Energy Sum for L1 trigger Tagger, Start, Veto, TOF, Cerenkov CW beam No crossing signal 500 MHz buckets 500 MSPS $80 250 MSPS, 8 bit FADC chip $20 Dynamic range adequate < 400 ps timing achievable 3360 Central Drift Anodes 200 micron resolution 8 bit, 250 MSPS with log amp 10 bit dE/dx 5760 Forward Drift Cathodes ? MSPS ? bit, positive signals
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Single channel FADC prototype
Test bed for: SPT converter chip Xilinx chip and software Mentor PCB & FPGA software Intellectual Property (PCI core) Robotic assembly
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Xilinx schematic
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Mixed VHDL & Graphics
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Robotic Selective Assembly
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Next (final?) version 6U PICMG 2.16 Xilinx V2PRO Clock/ Sync
Energy sum Ethernet Small Xilinx FADC Xilinx V2PRO 6U Clock/ Sync PICMG 2.16
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Cockcroft-Walton PMT base
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