1. Lecture 11 Switching & Forwarding
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Lecture 11
Lecture 11 Switching & Forwarding
EECS 122
University of California
Berkeley
EECS 122

2. TOC: Switching & Forwarding
Walrand
Lecture 11
TOC: Switching & Forwarding
Why?
Switching Techniques
Switch Characteristics
Switch Examples
Switch Architectures
Summary
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3. Switching: Why? Direct vs. Switched Networks:
Direct Network Limitations:
Distance (coordination delay; propagation limitation)
Number of hosts (collisions; shared bandwidth; address tables)
Single link technology (cannot mix optical, wireless, …)
Internetworking: Externality gain at low cost
n links
Single link
Switches
Direct
Switched
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4. Switching: Techniques
Circuit-Switching (e.g., Telephone net.)
Packet-Switching
Datagram (e.g., IP, Ethernet)
Virtual Circuits (e.g., MPLS, ATM)
Source Routing
Comparison
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5. Techniques: Circuit-Switching
Link divided into fixed,
independent circuits
Mechanism:
(e.g., TDM, WDM)
Circuit Switch
Connection list
Time scale: connection
Features:
Packets not switched independently (establish circuit before sending data)
Dedicated path and resources from source to destination
Setup time; low delays and guaranteed resources thereafter
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6. Techniques: Packet-Switching
Whole link shared by
all packets
Mechanism:
Packet Switch
Features:
Data separated into packets
Switching decision (output port) for each individual packet
Statistical multiplexing: Sum of peak rates may exceed link bandwidth (as long as mean does not)
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7. Techniques: PS - Datagram
General idea: no connection establishment, but each packet contains enough info to specify destination
Switches contain forwarding tables (but no per-connection “state”)
Forwarding tables contain info on which outgoing port to use for each destination
Two types of addressing:
Layer 2 or Layer 3
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8. Datagram: Layer 2 (e.g., Ethernet)
Flat address space (no structure)
Forwarding table: Exact match of destination L2 address
a 1 b 4 c 3 d 2 e 2 f 2
a 1 b 1 c 1 d 2 e 3 f 4 a d 1 2 2 1 4 b e 3 4 3
e|b| To
From c f
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9. Datagram: Layer 3 (e.g., IP)
L3-network (e.g., IP)
Topological structure – match prefix
Either fixed prefix length or longest match
E.g. 3
Fixed
Longest
1101
Other A B C D A’ C’ B’
1100
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10. Datagram: Layer 3 (e.g., IP)
matches bits at A, 1 at B, 3 at C  A = LPM
4 bits at A’  A’ = EM
Fixed
Longest
1101
Other A B C D A’ C’ B’
1100
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11. Datagram: Layer 3 (e.g., IP)
matches bits at A, 1 at B, 7 at C  C = LPM
Fixed
Longest
1101
Other A B C D A’ C’ B’
1100
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12. Datagram: Layer 3 (e.g., IP)
matches
0 bit at A’  B’ bit at B, 0 at C, 2 at D  D = LPM
E.g. 3
Fixed
Longest
1101
Other A B C D A’ C’ B’
1100
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13. Techniques: PS – Virtual Circuit
Connection setup establishes a path through switches
A virtual circuit ID (VCI) identifies path
Uses packet switching, with packets containing VCI
VCIs are often indices into per-switch connection tables; change at each hop
VC1 1 4 1
VC2 4
VC1
VC2
VC3
VC1 2
In, VC Out, VC
1, , 1
1, , 3
2, , 2 3 3 2
VC1
VC2
VC1 ….
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14. Techniques: Source Routing
Each packet specifies the sequence of routers
(or of output ports) from source to destination 1 2 3 4
source
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15. Techniques: Comparison
Datagram
Virtual circuit switching
Circuit switching
Forwarding cost
high
low
none
Bandwidth utilization
flexible
Resource reservations
yes
Robustness*
*The idea is that in case of failure, circuit and VC are lost; datagram routing can adapt after routing update ….
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16. Switching: Characteristics
Ports
Fast Ethernet, OC-3, ATM, …
Protocols
ST, Link Agg., VLAN, OSPF, RIP, BGP, VPN, Load Balancing, WRED, WFQ
Performance
Throughput, Reliability, Power, …
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17. Switching: Examples Juniper M160 Cisco “GSR” Cisco “7600”
Cisco “catalyst 6500”
Extreme “Summit”
Foundry “ServerIron”
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18. Examples: Cisco GSR - 12416 WAN Router – Large throughput; SONET links
Up to 16 line cards at 10 Gbps each
Crossbar Fabric
Line Cards: 1-port OC-192c 4-port OC48c Many others (ATM, Ethernet, …)
Cisco GSR 12416
19”
6ft
2ft
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19. Examples: Juniper M160 WAN Router – Large throughput; SONET links
Crossbar Fabric
Line Cards: 1-port OC-192c 4-port OC48c Many others (ATM, Ethernet, …)
Juniper M160
19”
Capacity: 80Gb/s Power: 2.6kW
3ft
2.5ft
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20. Examples: Cisco 7600 MAN-WAN Router
Up to 128 Gbps with Crossbar Fabric
10Mbps – 10Gbps LAN Interfaces
OC-3 to OC-48 SONET Interfaces
MPLS, WFQ, LLQ, WRED, Traffic Shaping
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21. Examples: Cisco cat 6500 From LAN to Access
48 to /100 Ethernet Interfaces
10 GE, OC-3, OC-12, OC-48, ATM
QoS, ACL
Load Balancing; VPN
Up to 128Gbps (with crossbar)
L4-7 Switching
VLAN
IP Telephony (E1, T1, inline-power Ethernet)
SNMP, RMON
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22. Examples: Extreme - Summit
48 10/100 ports
2 GE (SX, LX, or LX-70)
17.5Gbps non-blocking
10.1 Mpps
Wire speed L2
Wire speed L3 static or RIP
OSPF, DVRMP, PIM, …
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23. Examples: Foundry - ServerIron
Server Load Balancing
Transparent Cache Switching
Firewall Load Balancing
Global Server Load Balancing
Extended Layer 4-7 functionality including URL-, Cookie-, and SSL Session ID-based switching
Secure Network Address Translation (NAT) and Port address translation (PAT)
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24. Switching: Architectures
Generic Architecture
First Generation
Second Generation
Third Generation
Input Functions
Output Functions
Interconnection Designs
OUT IN
VOB
Combined IN/OUT
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25. Architectures: Generic
Input and output interfaces are connected through an interconnect
A interconnect can be implemented by
Shared memory
low capacity routers (e.g., PC-based routers)
Shared bus
Medium capacity routers
Point-to-point (switched) bus
High capacity routers
input interface
output interface
Inter-
connect
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26. Architectures: First Generation
Route
Table
CPU
Buffer
Memory
Line
Interface
MAC
Shared Backplane
CPU
Memory
Line Interface
Typically < 0.5Gbps aggregate capacity
Limited by rate of shared memory
Slide by Nick McKeown
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27. Architectures: Second Generation
Route
Table
CPU
Line
Card
Buffer
Memory
MAC
Fwding
Cache
Typically
< 5Gb/s aggregate capacity
Limited by shared bus
Slide by Nick McKeown
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28. Architectures: Third Generation
Line
Card
MAC
Local
Buffer
Memory
CPU
Switched Backplane
Line Interface
Fwding
Table
Routing
Typically
< 50Gbps aggregate capacity
Slide by Nick McKeown
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29. Architectures: Input Functions
Packet forwarding: decide to which output interface to forward each packet based on the information in packet header
examine packet header
lookup in forwarding table
update packet header
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30. Architectures: Output Functions
Buffer management: decide when and which packet to drop
Scheduler: decide when and which packet to transmit
Buffer
Scheduler 1 2
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31. Architectures: Output Functions (ct)
Packet classification: map each packet to a predefined flow/connection (for datagram forwarding)
use to implement more sophisticated services (e.g., QoS)
Flow: a subset of packets between any two endpoints in the network 1 2
Scheduler
flow 1
flow 2
flow n
Classifier
Buffer management
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32. Architectures: Output Queued
Only output interfaces store packets
Advantage
Easy to design algorithms: only one congestion point
Disadvantage
Requires an output speedup Ro/C = N, where N is the number of interfaces  not feasible for large N
input interface
output interface
Backplane C RO
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33. Architectures: Input Queues
Only input interfaces store packets
Advantages
Easy to build
Simple algorithms
Disadvantages
HOL Blocking
In practice: Speedup of 2 suffices
input interface
output interface
Backplane C RO
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34. Note: Head-of-line Blocking
The cell at the head of an input queue cannot be transferred, thus blocking the following cells
Cannot be transferred because of HOL blocking
Cannot be transferred because of output contention
Input 1
Output 1
Input 2
Output 2
Input 3
Output 3
Being transferred
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35. Architectures: Virtual Output Buffers
OUT buffers at each input port
Complexity: Matching Problem
Full throughput algorithm
Good Heuristic
Crossbar
Note: Figure from Prof. Varaiya’s notes for EE228b
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36. VOB: Full Throughput Maximum Weighted Matching: A = 14 B = 11 C = 15
B + C > A + D => Serve (B, C)
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37. VOB: Good Heuristic – i-SLIP
Inputs request permission to send from outputs
Outputs grant permissions to inputs (round-robin)
Inputs accept permissions (round-robin)
Request
Grant
Accept
Iter 2 3 1 1 3 2
Last Accept
Last Grant
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38. Architectures: Combined IN/OUT
Both input and output interfaces store packets
Advantages
Easy to built
Utilization 1 can be achieved with limited input/output speedup (<= 2)
Disadvantages
Harder to design algorithms
Two congestion points
Need to design flow control
input interface
output interface
Backplane C RO
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39. Switching: Summary Switching needed for big networks
Internetworking externality
Circuit
Packet – VC: QoS possible
Packet – Datagram
L2: Limited by flat address space
L3:
Exact Match: Easy lookup – less efficient
Longest Prefix Match
Switch functions: control and data
Different Architectures:
cost vs. performance
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