1. Interrupts and Interrupt Handling
David Ferry, Chris Gill
CSE 422S - Operating Systems Organization
Washington University in St. Louis
St. Louis, MO 63130

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Why Interrupts?
Interrupts allow a currently executing process to be preempted
Without interrupts, a process could only be removed from the processor when it ended or voluntarily yielded
Interrupt use cases:
The timer interrupt controls the scheduling frequency of a system
Peripheral devices use interrupts to request CPU attention
Processors use interrupts to communicate in multi-processor systems (e.g. for load balancing or synchronization)
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Interrupt Mechanisms
On the ARM architecture, there are three physical types of interrupts:
SWI: software interrupts (i.e. exceptions)
IRQ: regular hardware interrupts
FIQ: fast hardware interrupts
Linux has three interrupt semantics:
Software interrupts routed via SWI table
Hardware interrupts routed via the IDT
Inter-processor interrupts
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4. Software vs. Hardware Interrupts
Software interrupts we saw before:
User mode initiates system calls with the SWI instruction (or on x86, the INT instruction)
Illegal instructions are trapped
Occurs synchronously with processor instructions
Hardware interrupts are from devices:
Indicated by an electrical signal to a processor
On ARM, multiplexed by the Generic Interrupt Controller (GIC)
Asynchronous with instruction stream
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5. Hardware Interrupt Interface
Register new handlers with request_irq(), using three key attributes:
IRQ number
IRQ handler function
Whether the IRQ is shared
Handler functions execute in interrupt context:
Disables own interrupt line (optionally all interrupts)
May be interrupted by other interrupts
Does not need to be re-entrant
Cannot sleep
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6. Hardware Interrupt Tension
Handlers must be fast no matter what a task requires:
Can preempt more important work
Disables own interrupt line (bad for shared lines), and may disable all lines
Must perform potentially large amounts of work to service hardware
Cannot sleep/block, so cannot call functions that can sleep/block (such as kmalloc())
Strategy: Service hardware immediately but defer as much work as possible till later.
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7. Top Half / Bottom Half Processing
Modern interrupt handlers are split into top half (fast) and bottom half (slow) components
Top half:
Does minimum work to service hardware
Sets up future execution of bottom half
Clears interrupt line
Bottom half:
Performs deferred processing (more about this next time)
Example: Network card – top half clears card buffer while bottom half processes and routes packets
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8. Hardware Interrupt Implementation
Sequence of events:
Someone registers a handler on specific IRQ line
Device raises interrupt line with GIC
GIC de-multiplexes and interrupts CPU
CPU jumps to interrupt descriptor table (IRQ table or FIQ table) in entry_armv.S via svn_entry and irq_handle
C code starts at asm_do_irq()
generic_handle_irq() (architecture independent, found in kernel/irq/irqdesc.c)
Proceeds to specific handlers from there
Returns after executing all handlers
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9. Inter-processor Interrupts (IPIs)
Modern multi-core machines need a way for cores to communicate.
Start/stop/sleep/wakeup other cores
Request task migration
Request remote function call (synchronization)
Implemented differently from traditional interrupts, see smp_cross_call() in arch/arm/kernel/smp.c
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