1. Computer Architecture
Part IV-A: Input/Output (I/O)

2. I/O Devices I/O devices can be thought of as having 2 parts:
The actual I/O device itself
The device controller, which provides a common interface for each device (e.g. IDE, video adapters, etc.)
To communicate, the CPU and the I/O devices use the bus

3. Common I/O Devices Input Storage Output Keyboard Mouse Scanner
Magnetic Disks
Optical Disks
Magnetic Tapes
Output
Terminals
Printers

4. Magnetic Disks Importance For long-term, non-volatile storage of files
A level below MM (in the memory hierarchy) used for VM during program execution

5. Magnetic Disk Terms
Platter
Cylinder
Track
Sector

6. Disk Data Access Seek time Rotational latency/delay Disk bandwidth
Time to get to the track/cylinder containing the sector
Rotational latency/delay
Time to get to the desired sector
Disk bandwidth
Number of bytes transferred per unit time
Also referred to as transfer rate or transfer time

7. Buffer Cache
Same as that as the CPU cache, but it is located between a device and main memory

8. I/O Device Identification
To support multiple I/O devices, there must be a method to uniquely identify each device
Two methods of I/O addressing
Separate address space
Memory-mapped I/O

9. Separate Address Space
Each device is given an address different from the address space for memory
Needs separate instructions for I/O
Ideal for separate CPU-memory and I/O busses

10. Memory-Mapped I/O
I/O devices are given addresses which are part of the memory address space
I/O devices make use of the same instructions as that of memory
Ideal for single bus (CPU, memory and I/O) architecture

11. CPU-I/O Synchronization
I/O devices are slower than the CPU
Without synchronization, information may be lost when the CPU sends data to a device which is not yet ready
2 Methods of synchronization
Polling
Interrupts

12. Polling CPU tests if a device is ready to receive information
Constantly polling a device until it is ready is called busy waiting

13. Interrupts
Signal generated by hardware or software that tells the CPU to immediately execute a priority operation called an interrupt handler
An I/O device generates a hardware interrupt when it is ready to receive information

14. DMA
Interrupt-driven I/O relieves the CPU from waiting for every I/O event, but there is still wasted CPU cycles in transferring data
I/O events have a lot of block transfers (e.g. transfer of 2048 words might need 2048 loads and 2048 stores)
DMA allows transfer of words without intervention by CPU

15. DMA
Specialized processor that transfers data between memory and I/O while the CPU is busy doing something else
The CPU initiates the transfer then leaves rest to DMA controller which signals an interrupt when it is done
Very useful for large I/O transfers

16. I/O Transfer Modes Parallel Serial
Data is transferred in appropriate units (words, blocks, bytes, etc.) as a whole
Requires that the width of the bus is as long as the unit of transfer
Serial
Data is transferred one bit at a time
Data line is one bit wide

17. I/O Transfer Modes Synchronous
I/O transfers require the exchange of signals and parameters (device status, addresses) through some protocol
Protocol exchanges occur in conjunction with a clock common to both the CPU and I/O device

18. I/O Transfer Modes Asynchronous Makes use of handshaking
Handshaking - protocol exchanges occur in a stimulus-response fashion with a number of acknowledgements