1. EECE-276 Fall 2003 Microprocessors & Microcontrollers II
Lecture 03
68K Addressing Modes by
Juan J. Rodríguez-Moscoso
09/01/2003
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2. EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
REVIEW (Outline)
…From your MC68000 Programming Reference Card:
68K Programming Model (User & Supervisor)
Resources available:
(8+7+1=16) 32-bit Data & Address Registers
2 special-purpose registers (PC & SR)
16 MB Direct addressing range
56 Instruction Types
Operations on 5 main data types
Memory mapped I/O
14 Addressing Modes
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3. But, before we go on let’s talk about…
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
BYTE ORDER
But, before we go on let’s talk about…
big-endian and little-endian: These terms refer to which bytes are most significant in multi-byte data types and describe the order in which a sequence of bytes is stored in a computer’s memory.
In a big-endian system, the most significant value in the sequence is stored at the lowest storage address (i.e., first), for example Motorola processors.
In a little-endian system, the least significant value in the sequence is stored first, for example INTEL processors.
Example: Consider the number $ stored in a 4-byte integer:
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4. EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Any guesses?
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5. EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Very easy…
Address (offset)
Big-Endian
Little-Endian
$00
$12
$78
$01
$34
$56
$02
$03
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6. EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Final remarks…
Converting data between the two systems is sometimes referred to as the NUXI problem. Imagine the word UNIX stored in two 2-byte words. In Big-Endian systems, it would be stored as UNIX. In Little-Endian systems, it would be stored as NUXI.
Note that the example above shows only big- and little-endian byte orders. The bit ordering within each byte can also be big- or little-endian, and some architectures actually use big-endian ordering for bits and little-endian ordering for bytes, or vice versa.
These two terms (big-endian and little-endian) are derived from the Lilliputians of Gulliver's Travels, whose major political issue was whether soft-boiled eggs should be opened on the big side or the little side. Likewise, the big-/little-endian computer debate has much more to do with political issues than technological merits 
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7. Alright, let the fun begin…
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Alright, let the fun begin…
First, a notation is mandatory:
Ai,Di,Xi
Address/Data/General registers
[…]
“Contents of”
Di(0:7)
Bits 0 thru 7 of register Di
d8,d16,d32
8/16/32-bit signed offset
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8. About the 2 special purpose registers…
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
About the 2 special purpose registers…
Program Counter (PC)
The PC contains the address of the instruction currently executing. During instruction execution and exception processing, the processor automatically increments the contents or places a new value in the PC. For some addressing modes, the PC can be used as a pointer for PC relative addressing. Remember, only 24 bits are used.
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9. EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Status Register (SR)
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10. Main Data Types Five basic data types are supported: Bits
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Main Data Types
Five basic data types are supported:
Bits
BCD digits (4 bits)
Bytes (8 bits)
Words (16 bits)
Long Words (32 bits)
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11. EFFECTIVE ADDRESSING MODE SUMMARY
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
EFFECTIVE ADDRESSING MODE SUMMARY
Effective addressing modes are grouped according to the use of the mode:
Data addressing modes refer to data operands
Memory addressing modes refer to memory operands
Alterable addressing modes refer to alterable (writable) operands
Control addressing modes refer to memory operands without an associated size
These categories sometimes combine to form new categories that are more restrictive. Two combined classifications are alterable memory (addressing modes that are both alterable and memory addresses) and data alterable (addressing modes that are both alterable and data). Table 2-4 lists a summary of effective addressing modes and their categories.
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12. EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
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13. Immediate mode: MOVE.L #$123456,D4 [D4(0:31)]  $123456
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Immediate mode:
The operand value is included within the instruction
Useful for loading constant values into registers
Example:
MOVE.L #$123456,D4
[D4(0:31)]  $123456
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14. Absolute (short/long) data address:
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Absolute (short/long) data address:
Address of operand follows the instruction code
Useful for directly accessing data in two specific ranges of memory (loading variables, saving variables from registers, etc.)
Example:
MOVE.W D2,$8700
upper byte: [M($8700)]  [D2(8:15)]
lower byte: [M($8700)]  [D2(0:7)]
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15. (Data/Address) Register Direct:
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
(Data/Address) Register Direct:
(Data/Address) register as the operand. When Ai used as <dst>, size must be .W or .L (if .W is used, then Ai is loaded with signed-extended value)
Useful for fast data moves
Example:
MOVE.W D3,D2
[D2(0:15)]  [D3(0:15)]
(special move instruction MOVEA when moving data into an Ai register)
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16. Address Register Indirect:
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Address Register Indirect:
Address register (Ai) holds address of memory location that contains operand data. Use of () to let assembler know about this addressing mode
Useful for accessing data via a pointer
Example:
MOVE.W (A0),D3
[D3(0:15)]  [M([A0])]
Instruction variant:
MOVEA.X <ea>,Ai * X={W,L}
[Ai]  <ea>
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17. Address Register Indirect (cont)
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Address Register Indirect (cont)
Another example (expanded): Let’s assume
[A0]=$00007F00
What’s the result of the instruction:
MOVE.B (A0),D7
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18. Address Register Indirect with Postincrement:
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Address Register Indirect with Postincrement:
Same as 4, but Ai is incremented by 1, 2, or 4, after data transfer is accomplished
Useful for scanning through a list (forward), or to POP off a stack
Example:
MOVE.L (A3)+,D2
[D2]  [M([A3])] *
[A3]  [A3]+4 * Both in 1 instruction
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19. Address Register Indirect with Postincrement (cont)
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Address Register Indirect with Postincrement (cont)
Another example (expanded): Let’s assume
[A5]=$00007F00 & [D2]=$4E4F2000
What will each register contain after executing
MOVE.W (A5)+,D2
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20. Address Register Indirect with Predecrement:
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Address Register Indirect with Predecrement:
Same as 4, but Ai is decremented by 1, 2, or 4, before data transfer is accomplished
Useful for scanning through a list (backwards), or to PUSH onto a stack
Example:
MOVE.L -(A4),D3
[A4]  [A4]-4 *
[D3]  [M([A4])] * Both in 1 instruction
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21. Address Register Indirect with Predecrement (cont)
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Address Register Indirect with Predecrement (cont)
Another example (expanded): Let’s assume
[A2]=$00007F00 & [D4]=$F3052BC9
What will each register contain after executing
MOVE.B -(A2),D4
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22. Address Register Indirect with Displacement:
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Address Register Indirect with Displacement:
Same as 4, but:
Takes a 16-bit signed displacement [-32768,32767]
Signs extends it
Adds it to Ai to determine effective address
Useful for accessing data at a (relative) fixed offset from an address
Example:
MOVE.W -2(A1),D3
[D3]  [M(-2+[A1])]
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23. Address Register Indirect with Displacement (cont)
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Address Register Indirect with Displacement (cont)
Another example (expanded): Let’s assume
[A0]=$00007F00 & [D0]=$
What will D0 contain after executing
MOVE.W $100(A0),D0
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24. Address Register Indirect with Index:
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Address Register Indirect with Index:
This mode combines the ones just seen. Operand address is specified by adding together Ai, Xi (a signed index register, address or data), and an 8-bit signed displacement:
Ea = [Ai]+[Xi]+d8
Syntax: d8(An,Xm.R), where R={W,L}
Useful for implementing 2-dimensional arrays in memory
Example:
MOVE.L 7(A5,D1.W),D2
[D2]  [M([A5]+[D1(0:15)]+7)]
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25. Address Register Indirect with Index (cont)
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Address Register Indirect with Index (cont)
Another example (expanded): Let’s assume
[A0]=$00007F00 & [D4]=$
What will D3 contain after executing
MOVE.L 2(A0,D4.W),D3
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26. Program Counter relative addressing:
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Program Counter relative addressing:
This mode uses PC together with a signed displacement (8 or 16-bit wide) to form the operand address as
ea=[PC]+d16 (with Displacement)
ea=[PC]+[Xi]+d8 (with Index)
Useful for memory references
Example:
MOVE.B TABLE(PC),D0
...
TABLE DC.B <data bytes>
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27. Program Counter with Displacement (cont)
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Program Counter with Displacement (cont)
Another example (expanded with Displacement): A data byte pointed to by the label DATA is referenced in the MOVE instruction. Assuming initially
[D4]=$
The actual machine code for
MOVE.B DATA(PC),D4
is 183A 001C, where 183A is the opcode for instructing the uP to MOVE.B into D4 using this addressing mode.
Too much wording, let’s have a graphical view next…
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28. Program Counter with Displacement (cont-2)…
EECE-276 Fall 2003 Microprocessors & Microcontrollers II 68K Addressing Modes
Program Counter with Displacement (cont-2)…
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