1. Many-core Software Development Platforms
Michael McCool
Software Architect, Intel Corporation
9/20/2018

2. Background Speaker originally RapidMind’s Chief Scientist
RapidMind acquired by Intel in August 2009
… speaker now Software Architect in SSG/DPD/PPL
RapidMind platform still available and supported
Technology convergence with Ct platform underway
Eventual integration into Intel software products
Will address “category” of product: Many-core Software Development Platforms
My own views…
9/20/2018

3. What is a Parallel Platform?
Goals: support high-intensity parallel computations on multi-core and many-core processors while providing portability, ease of use, abstraction, and safety-by-default.
Key technologies that allow both high-level abstractions and performance portability:
Dynamic code generation: ISA independence, architectural adaptation, workload adaptation
Embedded interface: looks like a library, acts like a compiler; allows abstraction with minimal penalty
9/20/2018

4. Panel Questions… Language support Portable performance optimization
Heterogeneous cores
Tools
Libraries
9/20/2018

5. 1. Language support
“Platform” approach makes it possible to embed support in an existing compiler
Can use existing IDEs and development tools
Using platform is as easy as including a header file and linking to a library
Kernel code is “reoptimized” by dynamic compiler, and so can adapt to specific ISA, system architecture, and workload
First target is C++
But general idea can apply to any language
even scripting languages
Abstraction in C++ can be used to organize code
run-time costs avoided
Semantics based on “structured patterns”
9/20/2018

6. 2. Portable performance optimization
Performance comes from multiple parallelism mechanisms
Cores
Vector instructions
Functional units, pipelines, prefetching, hyperthreading….
Instruction sets and memory architectures can vary
Platform approach can adapt to these:
Architectural parameters such as vector widths and number of cores are abstracted away.
Dynamic code generation allows automatic or user-directed adaptation, ISA independence.
Dynamic code generation also enables advanced techniques such as auto-tuning.
9/20/2018

7. 3. Heterogeneous cores First goal: performance portability
Get the best performance from each core possible
Issues: numerical exactness, determinism
Same programming model, but manual core assignment
Desirable (?): automatic core assignment
Optimize for throughput?
Optimize for latency?
Optimize for power?
Dynamic or static core assignment?
Need to take costs into account
Asymptotic scalability: serial/parallel algorithms
Data transfer costs
Need to take capacities into account
Local memory/cache sizes
9/20/2018

8. 4. Tools What would be desirable: Debugging: Performance: Development:
Design out common classes of errors
Avoid race conditions, deadlock by construction
Functional debugging via serial equivalence
Visualizations, not just single-stepping
Performance:
Access to low-level internal performance measurements
Visualizations  leading to tuning actions
Development:
Automatic identification of opportunities, patterns, hazards
9/20/2018

9. 5. Libraries Three categories: Serial libraries:
Native “foreign function” interface needed
Reuse of existing binary code
Parallel execution in local state managed by platform
Parallel libraries, coexistence:
O/S manages threads and resource allocation
Facilities for efficiently sharing and moving data
Parallel libraries, integration:
Depends on shared standards for task and resource management
9/20/2018

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