1. Digital System Design
Review

5. Half Adder 1 1 +1 +1 2 10 C A B S 1 Add two binary numbers
A0 , B0 -> single bit inputs
S0 -> single bit sum
C1 -> carry out C A B S 1
Dec Binary
1 1
+1 +1
2 10

6. Multiple-bit Addition
Consider single-bit adder for each bit position.
A3 A A1 A0 A
B3 B2 B1 B0 B Ai
+Bi Ci Si
Ci+1 A B 1
Each bit position creates a sum and carry

7. Full Adder
Full adder made of several half adders

8. Full Adder A full adder can be made from
Hardware repetition simplifies hardware design
A full adder can be made from
two half adders (plus an OR gate).

9. Full Adder Putting it all together Single-bit full adder
Common piece of computer hardware
Block Diagram

10. 4-Bit Adder C A B S

11. 4-bit Subtractor: E = 1 +1 Add A to B’ (one’s complement) plus 1
That is, add A to two’s complement of B
D = A - B

12. Adder- Subtractor Circuit

24. Register with Parallel Load
Register: Group of Flip-Flops
Ex: D Flip-Flops
Holds a Word (Nibble) of Data
Loads in Parallel on Clock Transition
Asynchronous Clear (Reset)

25. Register with Load Control
New data loaded on next positive clock edge
Load Control = 0
Old data reloaded on next positive clock edge

26. Shift Registers Cascade chain of Flip-Flops Bits travel on Clock edges
Serial in – Serial out, can also have parallel load / read

27. Serial Transfer Data transfer one bit at a time
Data loopback for register A
Time T0 T1 T2 T3 T4
Reg A
1011
1101
1110
0111
Reg B
0011
1001
1100
0110
1011

28. Serial Addition (D Flip-Flop)

29. Universal Shift Register
Clear
Clock
Shift
Right
Left
Load
Read
Control

30. Binary Ripple Counter